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PDF ADG1604 Data sheet ( Hoja de datos )

Número de pieza ADG1604
Descripción Resistance
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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1 Ω Typical On Resistance, ±5 V,
+12 V, +5 V, and +3.3 V, 4:1 Multiplexer
ADG1604
FEATURES
1 Ω typical on resistance
0.2 Ω on resistance flatness
±3.3 V to ±8 V dual supply operation
3.3 V to 16 V single supply operation
No VL supply required
3 V logic-compatible inputs
Rail-to-rail operation
Continuous current per channel
LFCSP package: 504 mA
TSSOP package: 315 mA
14-lead TSSOP and 16-lead, 4 mm × 4 mm LFCSP
FUNCTIONAL BLOCK DIAGRAM
ADG1604
S1
S2
D
S3
S4
1 OF 4
DECODER
A0 A1 EN
Figure 1.
APPLICATIONS
Communication systems
Medical systems
Audio signal routing
Video signal routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Relay replacements
GENERAL DESCRIPTION
The ADG1604 is a complementary metal-oxide semiconductor
(CMOS) analog multiplexer and switches one of four inputs to
a common output, D, as determined by the 3-bit binary address
lines, A0, A1, and EN. Logic 0 on the EN pin disables the device.
Each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. In
the off condition, signal levels up to the supplies are blocked.
All switches exhibit break-before-make switching action.
Inherent in the design is low charge injection for minimum
transients when switching the digital inputs.
The ultralow on resistance of these switches make them ideal
solutions for data acquisition and gain switching applications where
low on resistance and distortion is critical. The on resistance profile
is very flat over the full analog input range, ensuring excellent
linearity and low distortion when switching audio signals.
The CMOS construction ensures ultralow power dissipation,
making the parts ideally suited for portable and battery-
powered instruments.
PRODUCT HIGHLIGHTS
1. 1.6 Ω maximum on resistance over temperature.
2. Minimum distortion: THD + N = 0.007%.
3. 3 V logic-compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V.
4. No VL logic power supply required.
5. Ultralow power dissipation: <16 nW.
6. 14-lead TSSOP and 16-lead, 4 mm × 4 mm LFCSP.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.

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ADG1604 pdf
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ADG1604
5 V SINGLE SUPPLY
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match Between Channels (∆RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION
tON (EN)
tOFF (EN)
Break-Before-Make Time Delay, tD
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise
−3 dB Bandwidth
CS (Off )
CD (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
VDD
25°C
1.7
2.15
0.05
0.09
0.4
0.53
±0.05
±0.2
±0.05
±0.2
±0.1
±0.4
0.001
8
175
283
135
174
228
288
30
70
70
70
0.09
16
70
300
400
0.001
−40°C to
+85°C
2.4
0.12
0.55
±1
±2
±2
337
194
342
−40°C to
+125°C
0 V to VDD
2.7
0.15
0.6
±8
±16
±16
2.0
0.8
±0.1
380
212
385
21
1
3.3/16
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
% typ
MHz typ
pF typ
pF typ
pF typ
μA typ
μA max
V min/max
Test Conditions/Comments
VS = 0 V to 4.5 V, IS = −10 mA; see Figure 22
VDD = 4.5 V, VSS = 0 V
VS = 0 V to 4.5 V, IS = −10 mA
VS = 0 V to 4.5 V, IS = −10 mA
VDD = 5.5 V, VSS = 0 V
VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 23
VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 23
VS = VD = 1 V or 4.5 V; see Figure 24
VIN = VGND or VDD
RL = 300 Ω, CL = 35 pF
VS = 2.5 V; see Figure 29
RL = 300 Ω, CL = 35 pF
VS = 2.5 V; see Figure 31
RL = 300 Ω, CL = 35 pF
VS = 2.5 V; see Figure 31
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 2.5 V; see Figure 30
VS = 2.5 V, RS = 0 Ω, CL = 1 nF; see Figure 32
RL = 50 Ω, CL = 5 pF, f = 100 kHz;
see Figure 25
RL = 50 Ω, CL = 5 pF, f = 100 kHz;
see Figure 27
RL = 110 Ω, f = 20 Hz to 20 kHz, VS = 3.5 V p-p;
see Figure 28
RL = 50 Ω, CL = 5 pF; see Figure 26
VS = 2.5 V, f = 1 MHz
VS = 2.5 V, f = 1 MHz
VS = 2.5 V, f = 1 MHz
VDD = 5.5 V
Digital inputs = 0 V or VDD
1 Guaranteed by design, not subject to production test.
Rev. 0 | Page 5 of 20

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15
ID, IS (ON) +, +
10 ID (OFF) –, +
5
IS (OFF) +, –
0
IS (OFF) –, +
–5 ID, IS (ON) –, –
ID (OFF) +, –
–10
–15
0
20 40 60 80 100 120
TEMPERATURE (°C)
Figure 10. Leakage Currents as a Function of Temperature, ±5 V Dual Supply
20
15
ID, IS (ON) +, +
10
ID (OFF) –, +
5 IS (OFF) +, –
0
–5 ID, IS (ON) –, –
IS (OFF) –, +
–10 ID (OFF) +, –
–15
0
20 40 60 80 100 120
TEMPERATURE (°C)
Figure 11. Leakage Currents as a Function of Temperature, 12 V Single Supply
20
15
ID, IS (OFF) +, +
10
ID, IS (OFF) –, –
5
ID (OFF) –, +
0
IS (OFF) +, –
IS (OFF) –, +
ID (OFF) +, –
–5
0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 12. Leakage Currents as a Function of Temperature, 5 V Single Supply
ADG1604
18
16
14
12 ID, IS (OFF) +, +
10
8 ID, IS (OFF) –, –
6 ID (OFF) –, +
4
IS (OFF) +, –
2
0
IS (OFF) –, +
–2
ID (OFF) +, –
–4
0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 13. Leakage Currents as a Function of Temperature, 3.3 V Single Supply
600
500
400
300
200
100
0
–100
0
IDD = +12V
ISS = 0V
IDD PER CHANNEL
TA = 25°C
IDD = +5V
ISS = –5V
IDD = +5V
ISS = 0V
IDD = +3.3V
ISS = 0V
246
LOGIC (V)
8
10 12
Figure 14. IDD vs. Logic Level
350
300
250
200
VDD = +5V
VSS = –5V
VDD = +12V
VSS = 0V
150
100
50
0
–6 –4 –2
VDD = +5V
VSS = 0V
VDD = +3.3V
VSS = 0V
0 2 4 6 8 10 12
VS (V)
Figure 15. Charge Injection vs. Source Voltage
14
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