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PDF PCA9625 Data sheet ( Hoja de datos )
| Número de pieza | PCA9625 | |
| Descripción | 16-bit Fm I2C-bus 100 mA 24V LED driver | |
| Fabricantes | NXP Semiconductors | |
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PCA9625
16-bit Fm+ I2C-bus 100 mA 24 V LED driver
Rev. 02 — 15 January 2008
Product data sheet
1. General description
The PCA9625 is an I2C-bus controlled 16-bit LED driver optimized for voltage switch
dimming and blinking 100 mA Red/Green/Blue/Amber (RGBA) LEDs. Each LED output
has its own 8-bit resolution (256 steps) fixed frequency individual PWM controller that
operates at 97 kHz with a duty cycle that is adjustable from 0 % to 99.6 % to allow the
LED to be set to a specific brightness value. An additional 8-bit resolution (256 steps)
group PWM controller has both a fixed frequency of 190 Hz and an adjustable frequency
between 24 Hz to once every 10.73 seconds with a duty cycle that is adjustable from 0 %
to 99.6 % that is used to either dim or blink all LEDs with the same value.
Each LED output can be off, on (no PWM control), set at its individual PWM controller
value or at both individual and group PWM controller values. The PCA9625 operates with
a supply voltage range of 2.3 V to 5.5 V and the 100 mA open-drain outputs allow
voltages up to 24 V.
The PCA9625 is one of the first LED controller devices in a new Fast-mode Plus (Fm+)
family. Fm+ devices offer higher frequency (up to 1 MHz) and more densely populated bus
operation (up to 4000 pF).
The active LOW Output Enable input pin (OE) blinks all the LED outputs and can be used
to externally PWM the outputs, which is useful when multiple devices need to be dimmed
or blinked together without using software control.
Software programmable LED Group and three Sub Call I2C-bus addresses allow all or
defined groups of PCA9625 devices to respond to a common I2C-bus address, allowing
for example, all red LEDs to be turned on or off at the same time or marquee chasing
effect, thus minimizing I2C-bus commands. Seven hardware address pins allow up to
126 devices on the same bus.
The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9625
through the I2C-bus, identical to the Power-On Reset (POR) that initializes the registers to
their default state causing the outputs to be set HIGH (LED off). This allows an easy and
quick way to reconfigure all device registers to the same condition.
The PCA9625 and PCA9635 software is identical and if the PCA9625 on-chip 100 mA
NAND FETs do not provide enough current or voltage to drive the LEDs, then the
PCA9635 with larger current or higher voltage external drivers can be used.
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6. Pinning information
6.1 Pinning
PCA9625
16-bit Fm+ I2C-bus 100 mA 24 V LED driver
LED13 1
LED14 2
LED15 3
OE 4
A5 5
A6 6
SCL 7
SDA 8
VDD 9
A0 10
A1 11
A2 12
A3 13
A4 14
LED0 15
LED1 16
PCA9625D
32 LED12
31 VSS(DRV)FET
30 LED11
29 LED10
28 LED9
27 LED8
26 VDD(DRV)FET
25 VSS
24 VDD(DRV)FET
23 LED7
22 LED6
21 LED5
20 LED4
19 VSS(DRV)FET
18 LED3
17 LED2
002aac787
Fig 2. Pin configuration for SO32
6.2 Pin description
Table 2.
Symbol
LED13
LED14
LED15
OE
A5
A6
SCL
SDA
VDD
A0
A1
A2
A3
A4
LED0
LED1
LED2
LED3
Pin description for SO32
Pin Type
1O
2O
3O
4I
5I
6I
7I
8 I/O
9 power supply
10 I
11 I
12 I
13 I
14 I
15 O
16 O
17 O
18 O
Description
LED driver 13
LED driver 14
LED driver 15
active LOW output enable
address input 5
address input 6
serial clock line
serial data line
supply voltage
address input 0
address input 1
address input 2
address input 3
address input 4
LED driver 0
LED driver 1
LED driver 2
LED driver 3
PCA9625_2
Product data sheet
Rev. 02 — 15 January 2008
© NXP B.V. 2008. All rights reserved.
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PCA9625
16-bit Fm+ I2C-bus 100 mA 24 V LED driver
7.3.2 Mode register 2, MODE2
Table 6. MODE2 - Mode register 2 (address 01h) bit description
Legend: * default value.
Bit Symbol
Access Value Description
7-
read only 0*
reserved
6-
read only 0*
reserved
5
DMBLNK
R/W
0* group control = dimming.
1 group control = blinking.
4 INVRT
R/W 0* reserved; write must always be a logic 0
3 OCH
R/W
0* outputs change on STOP command[1]
1 outputs change on ACK
2-
R/W 1* reserved; write must always be a logic 1
1-
R/W 0* reserved; write must always be a logic 0
0-
R/W 1* reserved; write must always be a logic 1
[1] Change of the outputs at the STOP command allows synchronizing outputs of more than one PCA9625.
Applicable to registers from 02h (PWM0) to 08h (LEDOUT) only.
7.3.3 PWM0 to PWM15, individual brightness control
Table 7. PWM0 to PWM15 - PWM registers 0 to 15 (address 02h to 11h) bit description
Legend: * default value.
Address Register Bit Symbol Access Value
Description
02h PWM0 7:0 IDC0[7:0] R/W 0000 0000* PWM0 Individual Duty Cycle
03h PWM1 7:0 IDC1[7:0] R/W 0000 0000* PWM1 Individual Duty Cycle
04h PWM2 7:0 IDC2[7:0] R/W 0000 0000* PWM2 Individual Duty Cycle
05h PWM3 7:0 IDC3[7:0] R/W 0000 0000* PWM3 Individual Duty Cycle
06h PWM4 7:0 IDC4[7:0] R/W 0000 0000* PWM4 Individual Duty Cycle
07h PWM5 7:0 IDC5[7:0] R/W 0000 0000* PWM5 Individual Duty Cycle
08h PWM6 7:0 IDC6[7:0] R/W 0000 0000* PWM6 Individual Duty Cycle
09h PWM7 7:0 IDC7[7:0] R/W 0000 0000* PWM7 Individual Duty Cycle
0Ah PWM8 7:0 IDC8[7:0] R/W 0000 0000* PWM8 Individual Duty Cycle
0Bh PWM9 7:0 IDC9[7:0] R/W 0000 0000* PWM9 Individual Duty Cycle
0Ch PWM10 7:0 IDC10[7:0] R/W 0000 0000* PWM10 Individual Duty Cycle
0Dh PWM11 7:0 IDC11[7:0] R/W 0000 0000* PWM11 Individual Duty Cycle
0Eh PWM12 7:0 IDC12[7:0] R/W 0000 0000* PWM12 Individual Duty Cycle
0Fh PWM13 7:0 IDC13[7:0] R/W 0000 0000* PWM13 Individual Duty Cycle
10h PWM14 7:0 IDC14[7:0] R/W 0000 0000* PWM14 Individual Duty Cycle
11h PWM15 7:0 IDC15[7:0] R/W 0000 0000* PWM15 Individual Duty Cycle
PCA9625_2
Product data sheet
Rev. 02 — 15 January 2008
© NXP B.V. 2008. All rights reserved.
11 of 33
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PCA9625.PDF ] | |
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