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Número de pieza ADCLK914
Descripción Open-Collector HVDS Clock/Data Buffer
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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FEATURES
7.5 GHz operating frequency
160 ps propagation delay
100 ps output rise/fall
110 fs random jitter
On-chip input terminations
Extended industrial temperature range: −40°C to +125°C
3.3 V power supply (VCC − VEE)
APPLICATIONS
Clock and data signal restoration
High speed converter clocking
Broadband communications
Cellular infrastructure
High speed line receivers
ATE and high performance instrumentation
Level shifting
Threshold detection
GENERAL DESCRIPTION
The ADCLK914 is an ultrafast clock/data buffer fabricated on
the Analog Devices, Inc., proprietary, complementary bipolar
(XFCB-3) silicon-germanium (SiGe) process. The ADCLK914
features high voltage differential signaling (HVDS) outputs
suitable for driving the latest Analog Devices high speed digital-
to-analog converters (DACs). The ADCLK914 has a single,
differential open-collector output.
The ADCLK914 buffer operates up to 7.5 GHz with a 160 ps
propagation delay and adds only 110 fs random jitter (RJ).
Ultrafast, SiGe, Open-Collector
HVDS Clock/Data Buffer
ADCLK914
FUNCTIONAL BLOCK DIAGRAM
VREF
VT
D
D
5050
VCC
ADCLK914
Q
Q
5050
VEE
Figure 1.
The input has a center tapped, 100 Ω, on-chip termination
resistor and accepts LVPECL, CML, CMOS, LVTTL, or LVDS
(ac-coupled only). A VREF pin is available for biasing ac-coupled
inputs.
The HVDS output stage is designed to directly drive 1.9 V each
side into 50 Ω terminated to VCC for a total differential output
swing of 3.8 V.
The ADCLK914 is available in a 16-lead LFCSP. It is specified
for operation over the extended industrial temperature range of
−40°C to +125°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.

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ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage (VCC to GND)
Input Voltage
Maximum Output Voltage
Minimum Output Voltage
Input Termination
Voltage Reference
Operating Temperature Range, Ambient
Operating Temperature, Junction
Storage Temperature Range
Rating
6.0 V
−0.5 V to VCC + 0.5 V
VCC + 0.5 V
VEE − 0.5 V
±2 V
VCC − VEE
−40°C to +125°C
150°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ADCLK914
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance (in Still Air)
Package Type
θJA Unit
16-Lead LFCSP
70 °C/W
ESD CAUTION
Rev. 0 | Page 5 of 12

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OUTLINE DIMENSIONS
PIN 1
INDICATOR
3.00
BSC SQ
TOP
VIEW
2.75
BSC SQ
0.45
0.60 MAX
0.50
0.40
0.30
BOTTOM VIEW
1213 16 1
EXPOSED
PAD
PIN 1
INDICATOR
*1.65
1.50 SQ
1.35
12° MAX
0.90
0.85
0.80
SEATING
PLANE
0.30
0.23
0.18
0.80 MAX
0.65 TYP
0.05 MAX
0.02 NOM
0.20 REF
0.50
BSC
9
8
1.50 REF
4
5 0.25 MIN
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
*COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2
EXCEPT FOR EXPOSED PAD DIMENSION.
Figure 20. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
3 mm × 3 mm Body, Very Thin Quad
(CP-16-3)
Dimensions shown in millimeters
ADCLK914
ORDERING GUIDE
Model
ADCLK914BCPZ-WP1
ADCLK914BCPZ-R71
ADCLK914BCPZ-R21
ADCLK914/PCBZ1
1 Z = RoHS Compliant Part.
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
Evaluation Board
Package Option
CP-16-3
CP-16-3
CP-16-3
Rev. 0 | Page 11 of 12

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