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Número de pieza | MAX11043 | |
Descripción | Simultaneous Sampling ADCs | |
Fabricantes | Maxim Integrated Products | |
Logotipo | ||
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No Preview Available ! 19-4250; Rev 0; 8/08
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4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
General Description
The MAX11043 features 4 single-ended or differential
channels of simultaneous-sampling ADCs with 16-bit
resolution. The MAX11043 contains a versatile filter
block and programmable-gain amplifier (PGA) per
channel. The filter consists of seven cascaded 2nd-
order filter sections for each channel, allowing the con-
struction of a 14th-order filter. The filter coefficients are
user-programmable. Configure each 2nd-order filter as
lowpass (LP), highpass (HP), or bandpass (BP) with
optional rectification. Gain and phase mismatch of the
analog signal path is better than -50dB.
The ADC can sample up to 800ksps per channel. A
40MHz serial interface provides communication to and
from the device. The SPI™ interface provides through-
put of 1600ksps; 4 channels at 400ksps per channel or
2 channels at 800ksps per channel. A software-selec-
table scan mode allows reading the ADC results while
simultaneously updating the DAC. Other features of the
MAX11043 include an internal (+2.5V) or external
(+2.0V to +2.8V) reference, power-saving modes, and
a PGA with gains of 1 to 64. The PGA includes an
equalizer (EQ) function that automatically boosts low-
amplitude, high-frequency signals for applications such
as CW-chirp radar.
The MAX11043 includes two 8-bit coarse DACs that set
the high and low references for a second-stage 12-bit
fine DAC, typically used for VCO control. Use software
controls to write to the DAC or step the DAC up and
down under hardware control in programmable steps.
The device operates from a +3.0V to +3.6V supply. The
MAX11043 is available in a 40-pin, 6mm x 6mm TQFN
package and operates over the extended -40°C to
+125°C temperature range.
Applications
Automotive Radar Systems
Data Acquisition Systems
Industrial Controls
Power-Grid Monitoring
Features
♦ 4 Single-Ended or Differential Channels of
Simultaneous-Sampling, 16-Bit ADCs
♦ ±10 LSB INL, ±1 LSB DNL, No Missing Codes
♦ 90dB SFDR, -86dB THD, 76dB SINAD,
77dB SNR at 100kHz Input
♦ PGA with Gain of 1, 2, 4, 8, 16, 32, or 64 for
Each Channel
♦ EQ Function Automatically Boosts
High-Frequency, Low-Amplitude Signals
♦ Seven-Stage Internal Programmable Biquad
Filters per Channel
♦ High Throughput, 400ksps per Channel for 4
Channels or 800ksps per Channel for 2 Channels
♦ Dual-Stage DAC
Two 8-Bit Coarse Reference DACs
12-Bit Fine DAC
♦ +2.5V Internal Reference or +2.0V to +2.8V
External Reference
♦ Single +3.3V Operation
♦ Shutdown and Power-Saving Modes
♦ 40-Pin, 6mm x 6mm TQFN Package
♦ -40°C to +125°C Operating Temperature
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX11043ATL+ -40°C to +125°C
40 TQFN-EP*
+Denotes a lead-free/RoHS-compliant package.
*EP = Exposed pad.
Pin Configuration
TOP VIEW
30 29 28 27 26 25 24 23 22 21
AINDN 31
20 OSCOUT
AINDP 32
19 OSCIN
AGND 33
18 EOC
REFBP 34
17 I.C.
I.C. 35
AINCN 36
MAX11043
16 SCLK
15 DIN
AINCP 37
14 DOUT
REFC 38
REFB 39
+
*EP 13 CS
12 CONVRUN
AINBP 40
11 DACSTEP
1 2 3 4 5 6 7 8 9 10
SPI is a trademark of Motorola, Inc.
*CONNECT EP TO AGND.
TQFN
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1 page www.DataSheet4U.com
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
ELECTRICAL CHARACTERISTICS (continued)
((VAVDD = +3.0V to +3.6V, VDVDD = +3.0V, CDVREG = 10µF, VAGND = VDGND = 0, common-mode input voltage = AVDD/2, VREFBP =
VREFA = VREFB = VREFC = VREFD = +2.5V (external reference), VREFDAC = VREFDACH = +1.25V (external reference), VREFDACL = 0,
CREFBP = CREFA = CREFB = CREFC = CREFD = CREFDAC = 1µF, fSCLK = 38.4MHz, fEXCLK = 38.4MHz (external clock applied to
OSCIN), clock divider set to 4, SHDN = DACSTEP = UP/DWN = DGND, CONVRUN = DVDD, all analog inputs driven directly through
a series 150Ω/330pF anti-alias filter, PGA gain = 1. Default filters and gain settings. TA = TMIN to TMAX, unless otherwise noted (Note 1).
Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
REFDAC_ Input Voltage Range
Input Resistance
VREFDAC_
INTERNAL REFERENCE
Reference Voltage
Reference Temperature
Coefficient
VREFBP
CRYSTAL OSCILLATOR (Max ESR 100Ω, 22pF Load Capacitors to DGND)
Maximum Crystal Operating
Frequency
Epson Electronics MA-505 (16MHz)
External Clock Input Frequency
Range
External clock applied to OSCIN
Stability
Startup Time
Excluding crystal
Epson Electronics MA-505 (16MHz)
OSCIN Input Low Voltage
When driven with external clock source
OSCIN Input High Voltage
OSCIN Leakage Current
DIGITAL INPUTS
Input High Voltage
When driven with external clock source
VIH
Input Low Voltage
Input Hysterisis
Input Leakage Current
Input Capacitance
DIGITAL OUTPUTS
Output-Voltage High
Output-Voltage Low
Three-State Leakage Current
Three-State Output Capacitance
VOLTAGE REGULATOR
Regulated Digital Supply Voltage
POWER REQUIREMENTS
Analog Supply Voltage
Digital Supply Voltage
VIL
IIN VIN = 0 or DVDD
CIN
VOH
VOL
ISOURCE = 0.8mA
ISINK = 1.6mA
DOUT only
DOUT only
DVREG Internal use only
MIN TYP MAX UNITS
0 1.4 V
150 kΩ
2.45 2.5 2.55
V
100 ppm/°C
16 MHz
4 40 MHz
25 ppm
10 ms
0.3 x
DVDD
V
0.7 x
DVDD
V
-5 +5 µA
0.7 x
DVDD
V
0.3 x
DVDD
V
15 mV
-1 +1 µA
15 pF
DVDD -
0.6
-1
15
0.4
+1
V
V
µA
pF
2.5 V
3.0 3.6 V
3.0 3.6 V
_______________________________________________________________________________________ 5
5 Page www.DataSheet4U.com
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
Functional Diagram
AINAP
AINAN
REFA
AINBP
AINBN
REFB
AINCP
AINCN
REFC
AINDP
AINDN
REFD
PGA
EQ
PGA
EQ
PGA
EQ
PGA
EQ
+2.5V
VOLTAGE
REFERENCE
SIGMA-DELTA
ADC
PROGRAMMABLE
DIGITAL FILTER
AVDD DVDD
SERIAL
INTERFACE
SIGMA-DELTA
ADC
PROGRAMMABLE
DIGITAL FILTER
UP/DWN
DACSTEP
CONVRUN
EOC
SHDN
SCLK
DOUT
DIN
MAX11043
SIGMA-DELTA
ADC
PROGRAMMABLE
DIGITAL FILTER
FLASH
POR
SIGMA-DELTA
ADC
R 8-BIT
DAC
R
REFBP
REFDAC
PROGRAMMABLE
DIGITAL FILTER
DIGITAL SUPPLY
INTERNAL
REGULATOR
+2.5V
CLOCK
12-BIT DAC
CRYSTAL
OSCILLATOR
AND CLOCK
BUFFER
DVREG
OSCOUT
OSCIN
2x
REFDACL REFDACH AOUT
AGND DGND
______________________________________________________________________________________ 11
11 Page |
Páginas | Total 32 Páginas | |
PDF Descargar | [ Datasheet MAX11043.PDF ] |
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