NJU26102 Datasheet PDF - JRC
| Part Number | NJU26102 | |
| Description | Eala / BBE ViVA / ViVA+ / ViVA2 / Mach3Bass / QFP32-R1 | |
| Manufacturers | JRC | |
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NJU26102
Digital Signal Processor for TV
■ General Description
■Package
The NJU26102 is a digital signal processor that provides Delay, eala, ViVA2+,
PEQ, and AGC.
The NJU26102 is suitable for audio products such as TV, CD radio- cassette,
speakers system, and others.
■ FEATURES
NJU26102FR1
- Software
• 3D sound : eala (NJRC Original Surround),
BBE ViVA, BBE ViVA+
• Sound Enhancement: : BBE, BBE Mach3Bass
• AGC
• 5Band PEQ
• Tone Control
• Audio Delay ( fs=48kHz : Max. 25ms, fs=44.1kHz : Max. 27ms, fs=32kHz : Max. 37ms )
• Master Volume
• WatchDog Clock Output
- Hardware
• 24bit Fixed-point Digital Signal Processing
• Maximum System Clock Frequency : 38MHz Max.
• Digital Audio Interface
• Digital Audio Format
: 3 Input ports / 3 Output ports
: I2S 24bit, Left- justified, Right-justified, BCK : 32/64fs
• Master / Slave Mode
: Master Mode MCK 1/2 fclk, 1/3 fclk
ex. MCK = 384Fs(1/2) or MCK = 256Fs(1/3) at fclk=768Fs
• Power Supply
: 2.5V
• Input terminal
: 3.3V Input tolerant
• Package
: QFP32-R1 (Pb-Free)
• Two kinds of micro computer interface : I2C bus (standard-mode/100kbps)
: Serial interface (4 lines: clock, enable, input data, output data)
The detail hardware specification is described in the “ NJU26100 Series Hardware Data Sheet”.
Ver.2006-11-27
-1-
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NJU26102
www.DataSheet4U.com
■ I2C bus
When the NJU26102 is configured for I2C bus communication during the Reset initialization sequence. I2C bus
interface transfers data to the SDA pin and clocks data to the SCL pin.
AD1 and AD2 pins are used to configure the seven-bit SLAVE address of the serial host interface. (Table 6) This
offers additional flexibility to a system design by four different SLAVE addresses of the NJU26102. An address can be
arbitrarily set up by the AD1 and AD2 pins. The I2C address of AD1/AD2 is decided by connection of AD1/AD2 pins.
Table 6 I2C bus SLAVE Address
bit7 bit6 bit5
0 01
0 01
0 01
0 01
AD2 AD1 R/W
bit4 bit3 bit2 bit1 bit0
1 10 0
1 1 0 1 R/W
1 11 0
1 11 1
Start
bit
Slave Address ( 7bit )
R/W
bit
ACK
* SLAVE address is 0 when AD1/2 is “Low”. SLAVE address is 1 when AD1/2 is “High”.
Note : In case of the NJU26102, only single-byte transmission is available. The serial host interface supports
“Standard-Mode (100kbps)” I2C bus data transfer.
■ 4-Wire Serial Interface
The serial host interface can be configured for 4-Wire Serial bus communication by setting SEL1 pin =”High” during the
Reset initialization sequence.
SHI bus communication is full-duplex; a write byte is shifted into the SDIN pin at the same time that a read byte is shifted
out of the SDOUT pin. Data transfers are MSB first and are enabled by setting the Slave Select pin Low ( SSb=0 ). Data is
clocked into SDIN on rising transitions of SCK. Data is latched at SDOUT on falling transitions of SCK except for the first byte
(MSB) which is latched on the falling transitions of SSb.
SDOUT is Hi-Z in case of SSb = “High”. SDOUT is CMOS output in case of SSb = “Low”. SDOUT needs a pull-up resistor
when SDOUT is Hi-Z.
SSb
SCK
SDIN
bit7 bit6 bit5
MSB
SDOUT Hi-Z bit7 bit6 bit5
bit1 bit0
LSB
bit1 bit0 unstable Hi-Z
Fig. 4 4-Wire Serial Interface Timing
Note: When the data-clock is less than 8 clocks, the input data is shifted to LSB side and is sent to the DSP core at the
transition of SSb=”High”. When the data-clock is more than 8 clocks, the last 8 bit data becomes valid. After
sending LSB data, SDOUT transmits the MSB data which is received via SDIN until SSb becomes “High”.
SDOUT is Hi-Z in case of SSb = “High”. SDOUT is CMOS output in case of SSb = “Low”. SDOUT needs a pull-up
resistor to prevent SDOUT from becoming floating level.
Ver.2006-11-27
-5-
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for NJU26102 electronic component. |
| Information | Total 8 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ NJU26102.PDF Datasheet ] | |
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Featured Datasheets
| Part Number | Description | MFRS |
| NJU26100 | The function is Hardware Specification. New Japan Radio |  |
| NJU26101 | The function is Eala / SRS 3D / TruSurround / ViVA / ViVA+/BBE / QFP32-R1. JRC | |
| NJU26102 | The function is Eala / BBE ViVA / ViVA+ / ViVA2 / Mach3Bass / QFP32-R1. JRC | |
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