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PDF ADT7421 Data sheet ( Hoja de datos )
| Número de pieza | ADT7421 | |
| Descripción | Temperature Sensor W/ Beta Correction | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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ADT7421
Precision Temperature
Sensor with Beta
Compensationwww.datasheet4u.com
(for <45nm geometries)
The ADT7421 is a dual−channel digital thermometer and
undertemperature/overtemperature alarm, intended for use in PCs and
thermal management systems. It is pin− and register−compatible with
the ADM1032, ADT7461 and ADT7461A.
The ADT7421 includes Beta Cancellation Technology. This enables
accurate measurement of temperature from very small geometry
(45nm) processes. Significant variations in the Beta factor can be
observed when different currents are applied to transistors embedded
in small geometry CPU’s. This leads to large temperature errors. The
ADT7421 automatically cancels the effects of error induced by beta
variations.
Features
• On−Chip and Remote Temperature Sensor
• 0.25°C Resolution on Remote Channel
• 1°C Resolution on Local Channel
• Automatically Cancels the Effect of Beta Variation in Thermal
Transistors on Small Geometry CPU’s
• Automatically Cancels Up to 50 W (Typical) of Resistance in Series
with Remote Transistor
• Extended, Switchable Temperature Measurement Range
0°C to +125°C (default) or −40°C to +125°C
• Pin− and Register−Compatible with ADM1032, ADT7461,
ADT7461A, EMC1402, and aSC7525
• 2−Wire SMBus Serial Interface with SMBus Alert Support
• Programmable Over/Undertemperature Limits
• Offset Registers for System Calibration
• Up to Two Overtemperature Fail−Safe THERM Outputs
• Small 8−lead MSOP and SOP Packages
Applications
• Desktop and Notebook Computers
• Industrial Controllers
• Smart Batteries
• Automotive
• Embedded Systems
• Burn−In Applications
• Instrumentation
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MARKING
DIAGRAMS
8
1 SOIC−8
CASE 751
8
T7421
ALYWR
#
1
1 MSOP−8
CASE 846AB
8
L
xx
1
(Top)
#YWW
ZZZZ
(Bottom)
xx = 75 or 76
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
ZZ = Assembly Lot Information
# = Pb−Free Package
PIN ASSIGNMENT
VDD
D+
D–
1
2
3
THERM 4
8 SCLK
7 SDATA
6 ALERT/THERM2
5 GND
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 20 of this data sheet.
© Semiconductor Components Industries, LLC, 2008
November, 2008 − Rev. 1
1
Publication Order Number:
ADT7421/D
1 page  
ADT7421
ELECTRICAL CHARACTERISTICS (TA = −40°C to +125°C, VDD = 3.0 V to 3.6 V, unless otherwise noted)
Parameter
Conditions
Min Typ
Power Supply
Supply Voltage, VDD
Average Operating Supply Current, IDD
Standby Mode Supply Current
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Power-On-Reset Threshold
0.0625 Conversions/Sec Rate (Note 1)
−40°C
−40°C
≤
≤
TTAA
≤
≤
+85°C
+125°C
3.0 3.30
3.0
1.0
Temperature−To−Digital Converter
Local Sensor Accuracy
Resolution
0°C ≤ TA ≤ +125°C
1.0
Remote Transistor Sensor Accuracy
Resolution
+40°C ≤ TA ≤ +85°C, +60°C ≤ TD ≤ +110°C (Note 2)
T+A25=°C+4≤0T°CA,≤++6805°C°C≤, +T6D0≤°C+1≤1T0°DC≤(N+1o1te0°2C) (Note 2)
0.25
Remote Sensor Source Current
The range of source currents provided to the external
thermal transistor for temperature measurements.
10 mA
to
360 mA
Conversion Time
From stop bit to conversion complete, one-shot mode
with averaging switched on.
One-shot mode with averaging off.
184
20
Maximum Series Resistance Cancelled Resistance split evenly on both the D+ and D– inputs.
50
Open−Drain Digital Outputs (THERM, ALERT/THERM2, SDA)
Output Low Voltage, VOL
High Level Output Leakage Current,
IOH
SMBus Interface (Note 3)
IOUT = −6.0 mA
VOUT = VDD
0.1
Logic Input High Voltage, VIH
SCL, SDA
3.0 V ≤ VDD ≤ 3.6 V
2.1
Logic Input Low Voltage, VIL
SCL, SDA
3.0 V ≤ VDD ≤ 3.6 V
Hysteresis
500
SDA Output Low Voltage, VOL
Logic Input Current, IIH, IIL
SMBus Input Capacitance, SCLK,
SDATA
IOUT = −6.0 mA
−1.0
10
SMBus Clock Frequency
SMBus Timeout (Note 4)
User programmable
25
SCLK Falling Edge to SDATA Valid
Time
Master clocking in data
1. See Table 4 for information on other conversion rates.
2. Guaranteed by characterization, but not production tested.
3. See SMBus Timing Specifications section for more information.
4. Disabled by default. Detailed procedures to enable it are in the Serial Bus Interface section of this datasheet.
Max
3.6
4.0
10
20
2.8
±2.75
±2.5
±3.25
±1.75
0.2
1.0
0.8
0.4
+1.0
400
300
1
Unit
V
mA
mA
V
°C
°C
°C
°C
mA
ms
W
V
mA
V
V
mV
V
mA
pF
kHz
ms
ms
http://onsemi.com
5
5 Page 
ADT7421
Offset Register
Offset errors can be introduced into the remote
temperature measurement by clock noise or when the
thermal transistor is located away from the hot spot. To
achieve the specified accuracy on this channel, these offsets
must be removed.
The offset value is stored as a 10−bit, twos complement
www.datavbsyahltueee,etl4ienuft.Rcjouemsgtiifsiteedr)0. xO1n1ly(hthigehubpypteer)twanodbRitsegoifstReerg0ixst1e2r
(low
0x12
are used. The MSB of Register 0x11 is the sign bit. The
minimum, programmable offset is −128°C, and the
maximum is +127.75°C. The value in the offset register is
added to, or subtracted from, the measured value of the
remote temperature.
The offset register powers up with a default value of 0°C
and has no effect unless the user writes a different value to it.
Table 6. Sample Offset Register Codes
Offset Value
−128°C
−4°C
−1°C
−0.25°C
0°C
+0.25°C
+1°C
+4°C
+127.75°C
0x11
1000 0000
1111 1100
1111 1111
1111 1111
0000 0000
0000 0000
0000 0001
0000 0100
0111 1111
0x12
00 00 0000
00 00 0000
00 00 0000
11 00 0000
00 00 0000
01 00 0000
00 00 0000
00 00 0000
11 00 0000
One−Shot Register
The one−shot register is used to initiate a conversion and
comparison cycle when the ADT7421 is in standby mode,
after which the device returns to standby. Writing to the
one−shot register address (0x0F) causes the ADT7421 to
perform a conversion and comparison on both the internal
and the external temperature channels. This is not a data
register as such, and it is the write operation to Address 0x0F
that causes the one−shot conversion. The data written to this
address is irrelevant and is not stored.
Consecutive ALERT Register
The value written to this register determines how many
out−of−limit measurements must occur before an ALERT is
generated. The default value is that one out−of−limit
measurement generates an ALERT. The maximum value that
can be chosen is 4. The purpose of this register is to allow the
user to perform some filtering of the output. This is
particularly useful at the fastest three conversion rates, where
no averaging takes place. This register is at Address 0x22.
Table 7. Consecutive ALERT Register 0x22
Bits Value† Number of Out−of−Limit
Measurements Required
<3−0>
000x
1
001x
2
011x
3
111x
4
†x = Don’t care bit.
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| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet ADT7421.PDF ] | |
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