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Número de pieza | FAN21SV06 | |
Descripción | Integrated Synchronous Buck Regulator | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
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FAN21SV06www.datasheet4u.com — TinyBuck™
6A, 24V Single-Input Integrated Synchronous Buck
Regulator with Synchronization Capability
Features
Single-Supply Operation with 6A Output Current
Over 94% Efficiency
Fully Synchronous Operation with Integrated
Schottky Diode on Low-Side MOSFET Boosts
Efficiency
Single Supply Device for VIN > 6.5V – 24V
Programmable Frequency Operation (200-600KHz)
Externally Synchronizable Clock with Master/Slave
Provisions
Wide Input Range with Dual Supply: 3.0V to 24V
Output Voltage Range: 0.8V to 80%VIN
Power-Good Signal
Accepts Ceramic Capacitors on Output
External Compensation for Flexible Design
Starts Up on Pre-Bias Outputs
Integrated Bootstrap Diode
Programmable Over-Current Protection
Under-Voltage, Over-Voltage, and Thermal-
Shutdown Protections
5x6mm, 25-pin, 3-pad MLP
Applications
Servers & Telecom
Graphics Cards & Displays
High-End Computing Systems
Set-Top Boxes & Game Consoles
Point-of-Load Regulation
Description
The FAN210SV06 TinyBuckTM is a highly efficient,
small-footprint, programmable-frequency, 6A integrated
synchronous buck regulator.
FAN21SV06 contains both synchronous MOSFETs and
a controller/driver with optimized interconnects in one
package, which enables designers to solve high-current
requirements in a small area with minimal external
components, thereby saving cost. On-board internal 5V
regulator enables single-supply operation for input
voltages >6.5V.
The FAN21SV06 can be configured to drive multiple
slave devices OR synchronize to an external system
clock. In slave mode, FAN21SV06 may be set up to be
free-running in the absence of a master clock signal.
External compensation, programmable switching
frequency, and current-limit features allow for design
optimization and flexibility. High-frequency operation
allows for all ceramic solutions.
Fairchild’s advanced BiCMOS power process combined
with low-RDS(ON) internal MOSFETs and a thermally
efficient MLP package provide the ability to dissipate
high power in a small package. Integration helps to
minimize critical inductances making layout simpler and
more efficient compared to discrete solutions.
Output over-voltage, under-voltage, over-current and
thermal-shutdown protections help protect the device
from damage during fault conditions. FAN21SV06
prevents pre-biased output discharge during startup in
point-of-load applications.
Ordering Information
Operating
Eco
Part Number Temperature Range Status
Package
Packing
Method
FAN21SV06MPX
-10°C to 85°C
RoHS Molded Leadless Package (MLP) 5x6mm Tape and Reel
FAN21SV06EMPX
-40°C to 85°C
RoHS Molded Leadless Package (MLP) 5x6mm Tape and Reel
© 2006 Fairchild Semiconductor Corporation
FAN21SV06 Rev. 1.0.0
www.fairchildsemi.com
1 page Electrical Characteristics
Recommended operating conditions and using the circuit shown in Figure 1, with VIN, VIN_Reg=12V, unless
otherwise noted.
Parameter
Conditions
Min. Typ. Max. Units
Power Supplies
www.datashOeept4eura.ctoinmg Current
(VIN+VIN_Reg)
VIN_Reg Operating Current
VIN_Reg Quiescent Current
VIN_Reg Standby Current
5V_Reg Output Voltage
5V_Reg Max Current Load
VIN=12V, 5V_Reg open, CLK open,
fSW=500KHz, No Load
EN=High, 5V_Reg open, CLK open,
fSW=500KHz
EN=High, FB=0.9V
EN=0, VIN=12V
Internal VCC Regulator, No Load
(6.5V <VIN_Reg<24V)
VIN_Reg=12V)
22 30 mA
11 mA
4 5 mA
1 mA
4.7 5.0 5.3 V
5 mA
VIN_Reg UVLO Threshold
Rising VIN, VIN=VIN_Reg
Falling VIN, VIN=VIN_Reg
Reference
Reference Voltage measured
at FB (See Figure 4 for
Temperature Coefficient)
FAN21SV06M, 25°C
FAN21SV06EM, 25°C
794
795
Oscillator
Frequency
Frequency in Slave Mode
compared to Master Mode
Minimum On-Time (2)
Duty Cycle
Ramp Amplitude,
Peak–to-Peak(2)
Minimum Off-Time (2)
RT=50kΩ to GND (Master Mode)
RT=24kΩ to GND (Master Mode)
RT=24 kΩ to 50kΩ to 5V_Reg
(Slave Mode)
VIN=6.5V, fSW=600KHz
16VIN, 1.8VOUT, RT=30kΩ, RRAMP=200kΩ
255
540
-15
Synchronization
CLK Output Pulse Width
CLK Output Sink Current
CLK Output Source Current
CLK Input Pulse Width
CLK Input Source Current
CLK Input Threshold, Rising
Master (RT to GND)
Master, VCLK=0.4V
Master, VCLK=2V
Slave: VCLK > 2V
Slave: VCLK=1V
Slave
70
0.25
-2.5
50
-230
1.73
Soft-Start
VOUT to Regulation (T0.8)
Fault Enable/SSOK (T1.0)
Frequency=500KHz
Error Amplifier
DC Gain (2)
Gain Bandwidth Product(2)
VIN_Reg > 6.5V
80
12
Output Voltage Swing (VCOMP)
Output Current, Sourcing
Output Current, Sinking
FB Bias Current
5V_Reg=5V, VCOMP=2.2V
5V_Reg=5V, VCOMP=1.2V
VFB=0.8V, 25°C
0.4
1.5
0.8
-850
Note:
2. Specifications guaranteed by design and characterization; not production tested.
5.6 6.3 V
5V
800 806 mV
800 805 mV
300
600
40
80
0.5
100
85
-200
1.83
2.5
3.1
85
15
2.2
1.2
-650
345
660
+15
65
85
150
100
0.35
-2.0
-170
1.93
KHz
KHz
%
ns
%
V
ns
ns
mA
mA
ns
µA
V
ms
ms
4.0
2.5
1.5
-450
dB
MHz
V
mA
mA
nA
© 2006 Fairchild Semiconductor Corporation
FAN21SV06 Rev. 1.0.0
5
www.fairchildsemi.com
5 Page Typical Performance Characteristics (Continued)
Typical operating characteristics using the circuit shown in Figure 1, unless otherwise specified.
95 95
1.8V_Eff 8-24V_600Khz
90
www.datasheet4u.com
85
80
8V
12V
75 16V
20V
24V
70
0 12 3 45 6
Load (A)
Figure 24. 1.8 VOUT Efficiency 600KHz
90
85
80
75
70
0
3.3V_Eff 8-24V_600Khz
8V
12V
16V
20V
24V
12 3 45 6
Load (A)
Figure 25. 3.3 VOUT Efficiency 600KHz
3
95 5V_PWRLOSS_12-24V_300Khz
2.5
90
5V_Eff12-24V_300Khz
2
85
Using DR1050-2R2-R
Inductor from Cooper
Using DR1050-2R2-R
1.5 Inductor from Cooper
80
1
12V
75 16V
20V 0.5
12V
16V
24V 20V
70
0 12 34 56
Load (A)
24V
0
0 1 2 3 Load (A) 4 5 6
Figure 26. 5 VOUT Efficiency 300KHz
(Circuit Values Change)
Figure 27. Device Power Loss (5 VOUT, 300KHz)
(Circuit Values Change)
95
1.8V_Eff, 12V Input
90
85
80
300Khz
75 400Khz
500Khz
600Khz
70
0 12 34 56
Load (A)
Figure 28. 1.8 VOUT Efficiency Over fSW
(Circuit Values Change)
7
Vout Vs Load Current
6 Input Voltage = 20V
Temperature rise = 80DegC
5
4
3
2
20Vin_500Khz
20Vin_600Khz
1
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13
Vout (V)
Figure 29. Typical Output Operating Area Based on
Thermal Limitations (Circuit Values Change)
© 2006 Fairchild Semiconductor Corporation
FAN21SV06 Rev. 1.0.0
11
www.fairchildsemi.com
11 Page |
Páginas | Total 17 Páginas | |
PDF Descargar | [ Datasheet FAN21SV06.PDF ] |
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