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PDF FDFMJ2P023Z Data sheet ( Hoja de datos )
| Número de pieza | FDFMJ2P023Z | |
| Descripción | MOSFET And Schottky Diode | |
| Fabricantes | Fairchild Semiconductor | |
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August 2007
FDFMJ2P023Z
Integrated P-Channel PowerTrench® MOSFET and Schottky Diode tm
www.datash–ee2t40uV.co,m–2.9A, 112mΩ
Features
General Description
MOSFET
Max rDS(on) = 112mΩ at VGS = –4.5V, ID = –2.9A
Max rDS(on) = 160mΩ at VGS = –2.5V, ID = –2.4A
Max rDS(on) = 210mΩ at VGS = –1.8V, ID = –2.1A
Max rDS(on) = 300mΩ at VGS = –1.5V, ID = –1.0A
Low gate charge, high power and current handline capability
This device is designed specifically as a single package solution
for the battery charge switch in cellular handset and other
ultra-portable applications. It features a MOSFET with low
on-state resistance and an independently connected low forward
voltage schottky diode for minimum conduction losses.
The SC-75 MicroFET package offers exceptional thermal
performance for it’s physical size and is well suited to linear mode
applications.
HBM ESD protection level > 1.5KV typical (Note 3)
Schottky
VF < 400mV @ 100mA
RoHS Compliant
Pin 1
AS G
CD
A1
TO BOTTOM
6 NC
S2
5A
NC A S
SC-75 MicroFET
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDS
VGS
ID
PD
TJ, TSTG
VRRM
IO
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
Schottky Repetitive Peak Reverse Voltage
Schottky Average Forward Current
Thermal Characteristics
G3
4S
TO BOTTOM
(Note 1a)
(Note 1a)
(Note 1b)
Ratings
–20
±8
–2.9
–12
1.4
0.7
–55 to +150
30
1
Units
V
V
A
W
°C
V
A
RθJA
RθJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
89
°C/W
(Note 1b)
182
Device Marking
.P23
Device
FDFMJ2P023Z
Package
SC-75 MicroFET
Reel Size
7’’
Tape Width
8 mm
Quantity
3000 units
©2007 Fairchild Semiconductor Corporation
FDFMJ2P023Z Rev.B
1
www.fairchildsemi.com
1 page  
Typical Characteristics TJ = 25°C unless otherwise noted
4.5
4.0 ID = -2.9A
3.5
www.datasheet4u.co3.m0
2.5
VDD = -3V
VDD = -5V
2.0 VDD = -7V
1.5
1.0
0.5
0.0
0
123
Qg, GATE CHARGE(nC)
4
Figure 7. Gate Charge Characteristics
5
1000
Ciss
100 Coss
10
0.1
f = 1MHz
VGS = 0V
Crss
1 10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure 8. Capacitance vs Drain
to Source Voltage
10-1
10-2 VDS = 0V
10-3
10-4
10-5 TJ = 150oC
10-6
10-7
10-8 TJ = 25oC
10-9
10-10
0 3 6 9 12
-VGS, GATE TO SOURCE VOLTAGE (V)
15
Figure 9. Gate Leakage Current vs Gate to
Source Voltage
30
10
100us
1 1ms
THIS AREA IS
LIMITED BY rDS(on)
0.1 SINGLE PULSE
TJ = MAX RATED
RθJA = 182oC/W
TA = 25oC
0.01
0.1 1
10ms
100ms
1s
10s
DC
10 60
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 10. Forward Bias Safe
Operating Area
10
1
0.1
0.01
TJ = 125oC
TJ = 85oC
TJ = 25oC
0.001
0.0 0.2 0.4 0.6 0.8 1.0 1.2
VF, FORWARD VOLTAGE(V)
Figure 11. Schottky Diode Forward Voltage
10
1 TJ = 125oC
0.1
0.01
TJ = 85oC
1E-3
1E-4
1E-5
0
TJ = 25oC
5 10 15 20 25
VR, REVERSE VOLTAGE (V)
30
Figure 12. Schottky Diode Reverse Current
©2007 Fairchild Semiconductor Corporation
FDFM2P023Z Rev.B
5
www.fairchildsemi.com
5 Page | ||
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| PDF Descargar | [ Datasheet FDFMJ2P023Z.PDF ] | |
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