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PDF RHFL4913 Data sheet ( Hoja de datos )
| Número de pieza | RHFL4913 | |
| Descripción | Rad-hard adjustable positive voltage regulator | |
| Fabricantes | STMicroelectronics | |
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RHFL4913
www.datasheet4u.com
Rad-hard adjustable positive voltage regulator
Features
■ 3 A low dropout voltage
■ Embedded overtemperature and overcurrent
protection
■ Adjustable overcurrent limitation
■ Output overload monitoring/signalling
■ Adjustable output voltage
■ Inhibit (ON/OFF) TTL-compatible control
■ Programmable output short-circuit current
■ Remote sensing operation
■ Rad-hard: guaranteed up to 300 krad Mil Std
883E Method 1019.6 high dose rate and 0.01
rad/s in ELDRS conditions
■ Heavy ion, SEL, and SEU immune; able to
sustain 2x1014 protons/cm2 and 2x1014
neutrons/cm2
Flat-16
SMD5C:
5-connection SMD
Description
The RHFL4913 high-performance adjustable
positive voltage regulator provides exceptional
radiation performance. It is tested in accordance
with Mil Std 883E Method 1019.6, in ELDRS
conditions.
The device is available in the Flat-16 and the new
SMD5C hermetic ceramic package, and the
QML-V die is specifically designed for space and
harsh radiation environments. It operates with an
input supply of up to 12 volts.
The RHFL4913 is QML-V qualified, DSCC SMD
#5962F02524.
November 2007
Rev 8
1/19
www.st.com
19
1 page  
RHFL4913
4 Maximum ratings
Table 2. Recommended maximum operating ratings (see Note:)
Symbol
Parameter
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VO
IO
IO
PD
Tstg
Top
ESD
DC input voltage, VI - VGROUND
DC output voltage range
Output current, RHFL4913KPA
Output current, RHFL4913SCA
TC = 25 °C power dissipation
Storage temperature range
Operating junction temperature range
Electrostatic discharge capability
Note:
Exceeding maximum ratings may damage the device.
Table 3. Thermal data
Symbol
Parameter
RthJC
TSOLD
Thermal resistance junction-case, Flat-16 and SMD5C
Maximum soldering temperature, 10 sec.
Maximum ratings
Value
12
1.23 to 9
2
3
15
-65 to +150
-55 to +150
Class 3
Unit
V
V
A
W
°C
°C
Value
8.3
300
Unit
°C/W
°C
5/19
5 Page 
RHFL4913
Application information
parasitic voltage, resistor RW1can be introduced to provide the necessary compensating
voltage signal to the ADJUST pin.
7.3 FPGA power supply lines
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Because these devices are very sensitive to VDD transients beyond a few % of their nominal
supply voltage (usually 1.5 V), special attention must be given by supply lines designers to
mitigate possible heavy ion L4913 disturbances. The worst case heavy ion effect can be
summarized as: the L4913 internal control loop being cut (made open) or short-circuited for
a sub-microsecond duration. During such an event, the L4913 die power element can either
provide excessive current or current supply stoppage to the output (VOUT) for a duration of
about one microsecond, after which time the L4913 smoothly recovers to nominal operation.
To mitigate these "transients", it is recommended to implement the L4913 PCB layout as
follows:
● Minimizing series/parallel parasitic inductances of the PC path
● Using a low ESR 47 µF Tantalum VOUT filtering capacitor with a 470 nF ceramic
capacitor in parallel with the former (to reduce dynamic ESR)
● Inserting a 100-200 nH ferrite core on the VOUT-to-tantalum capacitor wire
With this implementation, the ELDO simulated worst transient case shows no more than 90
mV deviation from the nominal line voltage value.
11/19
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet RHFL4913.PDF ] | |
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