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PDF HD64F7046 Data sheet ( Hoja de datos )
| Número de pieza | HD64F7046 | |
| Descripción | 32-Bit RISC Microcomputer | |
| Fabricantes | Renesas Technology | |
| Logotipo |  |
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REJ09B0270-0400
www.datasheet4u.com
The revision list can be viewed directly by
clicking the title page.
The revision list summarizes the locations of
revisions and additions. Details should always
be checked by referring to the relevant text.
32
SH7046 Group
Hardware Manual
Renesas 32-Bit RISC Microcomputer
SuperH RISC engine Family/SH7046 Series
HD64F7046
HD6437048
HD6437148
Rev. 4.00
Revision Date: Dec 05, 2005
1 page  
Preface
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The SH7046 Group single-chip RISC (Reduced Instruction Set Computer) microprocessor
includes a Renesas-original RISC CPU as its core, and the peripheral functions required to
configure a system.
Target users: This manual was written for users who will be using the SH7046 Group Micro-
Computer Unit(MCU) in the design of application systems. Users of this manual are
expected to understand the fundamentals of electrical circuits, logical circuits, and
microcomputers.
Objective:
This manual was written to explain the hardware functions and electrical
characteristics of the SH7046 Group MCU to the above users.
Refer to the SH-1, SH-2, SH-DSP Programming Manual for a detailed description
of the instruction set.
Notes on reading this manual:
• Product names
The following products are covered in this manual.
Product Classifications and Abbreviations
Basic Classification
On-Chip ROM Classification
SH7046 (80-pin version) SH7046F
Flash memory version
(ROM: 256 kbytes)
SH7048
Mask ROM version
(ROM: 128KB)
SH7148
Mask ROM version
(ROM: 64 kbytes)
Product Code
HD64F7046
HD6437048
HD6437148
In this manual, the product abbreviations are used to distinguish products. For example, 80-pin
products are collectively referred to as the SH7046, an abbreviation of the basic type's
classification code. There are two versions of each: a flash memory version and a mask ROM
version. When a description is limited to the flash memory version alone, the character F is
added at the end of the abbreviation, such as SH7046F. When a description is limited to the
mask ROM version alone, an abbreviation that is determined by the ROM size is used; for
example, SH7148 is used to indicate the mask ROM version.
Rev. 4.00 Dec 05, 2005 page v of xliv
5 Page 
Item
w1w0w.7.d.1at6ashCeoent4tue.nctoiomn
between
Overflow/Underflow
and Counter Clearing
Figure 10.83
Contention between
Overflow and Counter
Clearing
Page
258
10.7.17 Contention
between TCNT Write
and
Overflow/Underflow
Figure 10.84
Contention between
TCNT Write and
Overflow
259
10.7.22 Notes on
Buffer Operation
Settings
10.9.5 Usage Note
260
302
11.1 Features
11.3.3 Reset
Control/Status
Register (RSTCSR)
303
308
Revision (See Manual for Details)
Figure amended
Pφ
TCNT input
clock
TCNT
H'FFFF
Counter clear
signal
TGF
TCFV
Disabled
Figure amended
Pφ
TCNT write cycle
T1 T2
H'0000
Address
TCNT address
Write signal
TCNT
H'FFFF
TCFV flag
Newly added
TCNT write data
M
Description added
2. To clear bits POE0F, POE1F, POE2F, POE3F, and OSF to
0, read registers ICSR1 and OCSR. Clear bits, which are read
as 1, to 0, and write 1 to the other bits in the registers.
Description replaced
Description amended
RSTCSR is an 8-bit readable/writable register that controls the
generation of the internal reset signal when TCNT overflows .
Rev. 4.00 Dec 05, 2005 page xi of xliv
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HD64F7046.PDF ] | |
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