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Ericsson - Subscriber Line Interface Circuit

Numéro de référence PBL3798
Description Subscriber Line Interface Circuit
Fabricant Ericsson 
Logo Ericsson 





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PBL3798 fiche technique
March 1997
www.DataSheet4U.com
PBL 3798, PBL 3798/2
Subscriber Line
Interface Circuit
Description
PBL 3798 is an analog Subscriber Line Interface Circuit (SLIC), which is fabricated in
a 75 V bipolar, monolithic process.
The programmable, constant current feed circuit incorporates a switch mode
regulator to minimize on-chip power dissipation. A stand-by state further reduces idle
power dissipation, while allowing the supervisory functions to be active.
Tip-ring polarity is reversible without altering SLIC supervisory and voice frequency
(vf) functions. Tip and ring outputs can be set to high impedance states. These and
other operating states are activated via a parallel, four bit control word.
An external resistor controls the off-hook detector threshold current. A ground key
detector with internal reference reports tip/ring dc current unbalance. The ring trip
detector can operate with both balanced and unbalanced ringing systems. The three
detectors are read via a shared output.
Ring and test relay drivers with internal clamp diodes are provided.
The complex or real two-wire impedance is set by a scaled, lumped element
network.
Two- to four-wire and four- to two-wire signal conversion is provided by the SLIC in
conjunction with either a conventional or a programmable CODEC/filter.
Longitudinal line voltages are suppressed by a control loop within the SLIC.
The PBL 3798 package is 28-pin, dual-in-line; 32-pin or 44-pin j-leaded chip
carrier.
The difference between PBL 3798 and PBL 3798/2 is mainly the longitudinal
balance spec.
6/4
RINGRLY
7/5
TESTRLY
40/26
DR
38/25
DT
42/27
TIPX
34/22
HPT
35/23
HPR
43/28
RINGX
3/2
VREG
L 8/6
10/7
VBAT
GND2 2/1
Ring Relay
Driver
Test Relay
Driver
Ring Trip
Comparator
Two-wire
Interface
Input
Decoder
and
Control
Loop/Gnd key
Detector
VF Signal
Transmission
Line Feed
Controller and
Longitudinal
Suppression
Switching
Regulator
12/9 11/8 14/10
CHS VQBAT CHCLK
4/3
VCC
31/20
VEE
23/16
21/14
22/15
16/11
C1
C2
C3
C4
19/ E0
17/12
E1
20/13
DET
37/24
32/21
29/19
RD
VTX
RSN
26/17
15/
RDC
RSG
27/18
GND1
Key Features
• On-chip switch mode regulator to
minimize power dissipation
• Programmable, constant current feed
• Line feed characteristics independent
of battery variations
• Tip-ring polarity reversal function
• Tip and ring open circuit state;
tip open with ring active state
• Detectors:
- programmable loop current/ring
ground detector
- ground key detector
- ring trip detector
• Ring and test relay drivers
• Line terminating impedance, complex
or real, set by a simple external
network
• Hybrid function with conventional or
programmable CODEC/filters
• 70 dB longitudinal to metallic balance
• 79 mA peak longitudinal current
suppression
• Idle noise < 7 dBrnC; <-83 dBup
PBL 3798
Figure 1. Block diagram.
4-127

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