PDF ICX054AL Data sheet ( Hoja de datos )

Número de pieza	ICX054AL
Descripción	1/3-inch CCD Image Sensor
Fabricantes	Sony Corporation
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No Preview Available ! ICX054AL ww1w./D3ata-Sihneect4hU.coCmCD Image Sensor for EIA B/W Camera For the availability of this product, please contact the sales office. Description The ICX054AL is an interline CCD solid-state 16 pin DIP (Plastic) image sensor suitable for EIA 1/3-inch B/W video cameras. High sensitivity is achieved through the adoption of HAD (Hole-Accumulation Diode) sensors. This chip features a field period readout system, and an electronic shutter with variable charge- storage time. Features • High sensitivity (+3dB compare with ICX044BLA) and low dark current • Continuous variable-speed shutter 1/60s (Typ.), 1/100s to 1/10000s • Low smear • Excellent antiblooming characteristics • Horizontal register: 5V drive • Reset gate: 5V drive Pin 1 V 2 H 25 Pin 9 Device Structure • Optical size: 1/3-inch format Optical black position (Top View) • Number of effective pixels: 510 (H) x 492 (V) approx. 250K pixels • Number of total pixels: 537 (H) x 505 (V) approx. 270K pixels • Interline CCD image sensor • Chip size: 6.00mm (H) x 4.96mm (V) • Unit cell size: 9.6µm (H) x 7.5µm (V) • Optical black: Horizontal (H) direction: Front 2 pixels, Rear 25 pixels Vertical (V) direction: Front 12 pixels, Rear 1 pixel • Number of dummy bits: Horizontal 16 Vertical 1 (even field only) • Substrate material: Silicon 1 12 Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E92705E66-ST 1 page ICX054AL Cwlowcwk.DEatqaSuhiveeatl4eUn.ctoCmircuit Constant Item Capacitance between vertical transfer clock and GND Capacitance between vertical transfer clocks Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks Capacitance between reset gate clock and GND Capacitance between substrate clock and GND Vertical transfer clock series resistor Vertical transfer clock ground resistor Horizontal transfer clock series resistor Reset gate clock series resistor Symbol CφV1, CφV3 CφV2, CφV4 CφV12, CφV34 CφV23, CφV41 CφV13 CφV24 CφH1, CφH2 CφHH CφRG CφSUB R1, R3 R2, R4 RGND RφH RφRG Vφ1 Vφ2 Min. Typ. Max. Unit Remarks 1500 pF 820 pF 470 pF 230 pF 150 pF 230 pF 47 pF 47 pF 5 pF 320 pF 51 Ω 100 Ω 15 Ω 10 Ω 40 Ω CφV12 R1 R2 CφV41 CφV1 CφV2 CφV23 CφV24 R4 CφV4 RGND CφV3 CφV34 CφV13 R3 RφH Hφ1 CφH1 CφHH RφH Hφ2 CφH2 Vφ4 Vφ3 Vertical transfer clock equivalent circuit Horizontal transfer clock equivalent circuit RGφ RφRG CφRG Reset gate clock equivalent circuit –5– 5 Page ICX054AL 6w. wDwa.DrkatasSighneeatl4sUh.caodming After measuring 5, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. ∆Vdt = Vdmax – Vdmin [mV] 7. Flicker Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the signal output is 200mV, and then measure the difference in the signal level between fields (∆Vf [mV]). Then substitute the value into the following formula. F = (∆Vf/200) × 100 [%] 8. Lag Adjust the signal output value generated by strobe light to 200mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following formula. Lag = (Vlag/200) × 100 [%] FLD SG1 Strobe light timing Output Light Signal output 200mV Vlag (lag) – 11 – 11 Page

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