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PDF HY531000A Data sheet ( Hoja de datos )
| Número de pieza | HY531000A | |
| Descripción | 1M X 1 Fast Page Mode | |
| Fabricantes | Hynix Semiconductor | |
| Logotipo |  |
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HY531000A
1Mx1, Fast Page mode
DESCRIPTION
This family is a 1M bit dynamic RAM organized 1,048,576 x 1-bit configuration with Fast Page mode CMOS
DRAMs. Fast Page mode offers high speed of random access memory within the same row. The circuit and process design
allow this device to achieve high performance and low power dissipation. Optional features are access time(60, 70 or 80ns)
and power consumption (Normal or Low power). Hyundai’s advanced circuit design and process technology allow this
device to achieve high bandwidth, low power consumption and high reliability.
FEATURES
Ÿ Fast Page Mode operation
Ÿ Read-modify-write Capability
Ÿ TTL compatible inputs and outputs
Ÿ /CAS-before-/RAS, /RAS-only, Hidden and
Self refresh capability
Ÿ Max. Active power dissipation
Speed
60
70
80
Power
467mW
412mW
357mW
Ÿ Refresh cycle
Part number
HY531000A
Refresh
512
Normal
8ms
L-part
64ms
Ÿ JEDEC standard pinout
Ÿ 20/26-pin SOJ (300mil)
Ÿ Single power supply of 5V ± 10%
Ÿ Early Write or output enable controlled write
Ÿ Fast access time and cycle time
Speed
60
70
80
tRAC
60ns
70ns
80ns
tCAC
15ns
20ns
20ns
tPC
40ns
40ns
45ns
ORDERING INFORMATION
Part Name
HY531000AJ
HY531000ALJ
*L : Low power
Refresh
512
512
Power
L-part
Package
20/26Pin SOJ
20/26Pin SOJ
This document is a general product description and is subject to change without notice. Hyundai electronics does not assume any responsibility for use of
circuits described. No patent licences are implied
Rev.10 / Jan.98
1
Hyundai Semiconductor
1 page  
www.DataSheet4U.com
DC CHARACTERISTICS
(TA = 0°C to 70°C , VCC = 5V ± 10%, VSS = 0V, unless otherwise noted.)
Symbol
Parameter
Test condition
ICC1 Operating Current
/RAS, /CAS Cycling
tRC = tRC(min)
ICC2 TTL Standby
Current
/RAS, /CAS ≥ VIH(min)
Other inputs ≥ VSS
ICC3 /RAS-only Refresh
Current
/RAS Cycling,/CAS = VIH
tRC = tRC(min)
ICC4
Fast Page mode Current /CAS Cycling, /RAS = VIL
tPC = tPC(min)
ICC5 CMOS Standby
Current
/RAS = /CAS ≥ VCC - 0.2V
ICC6 /CAS-before-/RAS
Refresh Current
ICC7 Battery Back-up
Current (L-part)
/RAS & /CAS = 0.2V
tRC = tRC(min.)
tRC=125µs
/CAS = CBR cycling or 0.2V
/OE & /WE = VCC - 0.2V
Address = Vcc-0.2V or 0.2V
D = Vcc-0.2, 0.2V or Open
Q = open
HY531000A
Speed
60
70
80
60
70
80
60
70
80
L-part
60
70
80
tRAS ≤
300ns
tRAS ≤
1us
Max.
85
75
65
2
85
75
65
70
55
45
1
200
85
75
65
300
400
Unit
mA
mA
mA
mA
mA
µA
mA
µA
Note
1. ICC1, ICC3, ICC4, ICC6 and Icc7 depend on output loading and cycle rates.
2. Specified values are obtained with output unloaded.
3. ICC is specified as an average current. In ICC1, ICC3, ICC6, address can be changed only once while /RAS=VIL. In ICC4,
address can be changed maximum once while /CAS=VIH within one cycle time tPC.
4. Only tRAS(max) = 1µs is applied to refresh of battery backup but tRAS(max) = 10µs is to applied to normal functional
operation.
5. Icc5(max.), Icc7 are applied to L-part only.
1Mx1,FP DRAM
Rev.10 / Jan.98
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet HY531000A.PDF ] | |
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