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Numéro de référence | IDT70V3319 | ||
Description | (IDT70V3319 / IDT70V3399S) HIGH-SPEED 3.3V 256/128K x 18 SYNCHRONOUS DUAL-PORT STATIC RAM | ||
Fabricant | Integrated Device Technology | ||
Logo | |||
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HIGH-SPEED 3.3V
256/128K x 18
SYNCHRONOUS
IDT70V3319/99S
DUAL-PORT STATIC RAM
WITH 3.3V OR 2.5V INTERFACE
Features:
◆ True Dual-Port memory cells which allow simultaneous
access of the same memory location
◆ High-speed data access
– Commercial: 3.6ns (166MHz)/4.2ns (133MHz) (max.)
– Industrial: 4.2ns (133MHz) (max.)
◆ Selectable Pipelined or Flow-Through output mode
– Due to limited pin count PL/FT option is not supported
on the 128-pin TQFP package. Device is pipelined
outputs only on each port.
◆ Counter enable and repeat features
◆ Dual chip enables allow for depth expansion without
additional logic
◆ Full synchronous operation on both ports
– 6ns cycle time, 166MHz operation (6Gbps bandwidth)
– Fast 3.6ns clock to data out
– 1.7ns setup to clock and 0.5ns hold on all control, data, and
address inputs @ 166MHz
Functional Block Diagram
UBL
LBL
– Data input, address, byte enable and control registers
– Self-timed write allows fast cycle time
◆ Separate byte controls for multiplexed bus and bus
matching compatibility
◆ Dual Cycle Deselect (DCD) for Pipelined Output mode
◆ LVTTL- compatible, single 3.3V (±150mV) power supply
for core
◆ LVTTL compatible, selectable 3.3V (±150mV) or 2.5V
(±100mV) power supply for I/Os and control signals on
each port
◆ Industrial temperature range (-40°C to +85°C) is
available at 133MHz.
◆ Available in a 128-pin Thin Quad Flatpack, 208-pin fine
pitch Ball Grid Array, and 256-pin Ball
Grid Array
◆ Supports JTAG features compliant to IEEE 1149.1
– Due to limited pin count, JTAG is not supported on the
128-pin TQFP package.
UBR
LBR
FT/PIPEL
R/WL
CE0L
CE1L
OEL
0a 1a 0b 1b
1/0
ab
1
0
1/0
BB
WW
01
LL
Dout0-8_L
Dout9-17_L
BB
WW
10
RR
Dout0-8_R
Do ut9-17_R
1b 0b
b
1a 0a
a
1/0
1
0
1/0
FT/PIPER
R/WR
CE0R
CE1R
OER
FT/PIPEL
1b 0b 1a 0a
0/1
ab
I/O0L - I/O17L
CLKL
A17 L(1)
A0L
REPEATL
ADSL
CNTENL
NOTE:
1. A17 is a NC for IDT70V3399.
Counter/
Address
Reg.
TDI
TDO
©2003 Integrated Device Technology, Inc.
256K x 18
MEMORY
ARRAY
Din_L
Din_R
ADDR_L
ADDR_R
JTAG
1
0a 1a 0b 1b
ba
0/1
FT/PIPER
Counter/
Address
Reg.
TCK
TMS
TRST
I/O0R - I/O17R
CLKR
A17R(1)
A0R
REPEATR
ADSR
CNTENR
,
5623 tbl 01
MAY 2003
DSC 5623/7
,
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Pages | Pages 23 | ||
Télécharger | [ IDT70V3319 ] |
No | Description détaillée | Fabricant |
IDT70V3319 | (IDT70V3319 / IDT70V3399S) HIGH-SPEED 3.3V 256/128K x 18 SYNCHRONOUS DUAL-PORT STATIC RAM | Integrated Device Technology |
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