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PDF DS1669 Data sheet ( Hoja de datos )

Número de pieza DS1669
Descripción Dallastat Electronic Digital Rheostat
Fabricantes Dallas Semiconductor 
Logotipo Dallas Semiconductor Logotipo



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DS1669
DallastatTM Electronic Digital Rheostat
FEATURES
Replaces mechanical variable resistors
Electronic interface provided for digital as
well as manual control
Wide differential input voltage range
between 4.5 and 8 volts
Wiper position is maintained in the absence
of power
Low-cost alternative to mechanical controls
Applications include volume, tone, contrast,
brightness, and dimmer control
Available in 8-pin SOIC and 8-pin DIP
packages
Standard resistance values for Dallastat:
DS1669-10 ~ 10 k
DS1669-50 ~ 50 k
DS1669-100 ~ 100 k
Operating Temperature Range
Industrial: -40°C to +85°C
PIN ASSIGNMENT DS1669
(RH) 1 8 +V
UC 2 7 DC
D 3 6 RW
(RL) 4 5 V-
8-Pin SOIC (208-mil)
See Mech. Drawings Section
(RH)
UC
D
(RL)
1
2
3
4
8 +V
7 DC
6 RW
5 -V
8-Pin DIP (300-mil)
See Mech. Drawings Section
PIN DESCRIPTION DS1669
RH - High Terminal of Potentiometer
RW - Wiper Terminal of Potentiometer
RL - Low Terminal of Potentiometer
-V, +V
- Voltage Inputs
UC - Up Contact Input
D - Digital Input
DC - Down Contact Input
DESCRIPTION
The DS1669 DallastatTM is a digital rheostat or potentiometer. This device provides 64 possible uniform
tap points over the entire resistive range. The standard resistive ranges are 10 k, 50 k, and 100 k.
The Dallastat can be controlled by either a switch contact closure input or a digital source input such as a
CPU. Wiper position is maintained in the absence of power through the use of a EEPROM memory cell
array. The EEPROM cell array will withstand more than 50,000 writes.
The DS1669 is offered in two standard IC packages which include an 8-pin 300-mil DIP and an 8-pin
208-mil SOIC. The DS1669 can be configured to operate using a single pushbutton, dual pushbutton or
digital source input by varying power-on conditions. This is illustrated in Figures 1 and 2. The DS1669
pinouts allow access to both ends of the potentiometer RL, RH, and the wiper, RW. Control inputs include
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DS1669 pdf
DS1669
DS1669 DUAL PUSHBUTTON CONFIGURATION (TYPICAL APPLICATION)
Figure 2B
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The DS1669 is provided with two supply inputs -V and +V. The maximum voltage difference between
the two supply inputs is +8.0 volts. The minimum voltage difference is +4.5 volts. All input levels are
referenced to the negative supply input, -V. The voltage applied to any Dallastat terminal must not exceed
the negative supply voltage (-V ) by -0.5 or the positive supply voltage (+V) by +0.5 volts. The minimum
logic high level must be +2.4 volts with reference to the -V supply voltage input for +V=5V. A logic low
level with reference to the -V supply voltage has a maximum value of +0.8 volts. Dallastats exhibit a
typical wiper resistance of 400 ohms with a maximum wiper resistance of 1000 ohms. The maximum
wiper current allowed through the Dallastat is specified at 1 milliamps (see DC Electrical
Characteristics).
NONVOLATILE WIPER SETTINGS
Dallastats maintain the position of the wiper in the absence of power. This feature is provided through the
use of EEPROM type memory cell arrays. During normal operation the position of the wiper is
determined by the input multiplexer. Periodically, the multiplexer will update the EEPROM memory
cells. The manner in which an update occurs has been optimized for reliability, durability, and
performance. Additionally, the update operation is totally transparent to the user.
When power is applied to the Dallastat, the wiper setting will be the last recorded in the EEPROM
memory cells. If the Dallastat setting is changed after power is applied, the new value will be stored after
a delay of 2 seconds. The initial storage of a new value after power-up occurs when the first change is
made, regardless of when this change is made.
After the initial change on power-up, subsequent changes in the Dallastat EEPROM memory cells will
occur only if the wiper position of the part is moved greater than 12.5% of the total resistance range. Any
wiper movement after initial power-up which is less than 12.5% will not be recorded in the EEPROM
memory cells. Since the Dallastat contains a 64-to-1 multiplexer, a change of greater than 12.5%
corresponds to a change of the fourth LSB.
Changes or storage to the EEPROM memory cells must allow for a 2-second delay to guarantee that
updates will occur. The EEPROM memory cells are specified to accept greater than 80,000 writes before
a wear-out condition. If the EEPROM memory cells do reach a wear-out condition, the Dallastat will still
function properly while power is applied. However, on power-up the device’s wiper position will be that
of the position last recorded before memory cell wear-out.
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