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ADC08D1520 fiches techniques PDF

National Semiconductor - Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter

Numéro de référence ADC08D1520
Description Dual 1.5 GSPS or Single 3.0 GSPS A/D Converter
Fabricant National Semiconductor 
Logo National Semiconductor 





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ADC08D1520 fiche technique
April 7, 2008
www.DataSheet4U.com
ADC08D1520
Low Power, 8-Bit, Dual 1.5 GSPS or Single 3.0 GSPS A/D
Converter
General Description
The ADC08D1520 is a dual, low power, high performance
CMOS analog-to-digital converter that builds upon the
ADC08D1500 platform. The ADC08D1520 digitizes signals to
8 bits of resolution at sample rates up to 1.7 GSPS. It has
expanded features compared to the ADC08D1500, which in-
clude a test pattern output for system debug, a clock phase
adjust, and selectable output demultiplexer modes. Consum-
ing a typical 1.6 Watts in Non-Demultiplex Mode at 1.0 GSPS
from a single 1.9 Volt supply, this device is guaranteed to have
no missing codes over the full operating temperature range.
The unique folding and interpolating architecture, the fully dif-
ferential comparator design, the innovative design of the in-
ternal sample-and-hold amplifier and the self-calibration
scheme enable a very flat response of all dynamic parameters
beyond Nyquist, producing a high 7.4 Effective Number of Bits
(ENOB) with a 748 MHz input signal and a 1.5 GHz sample
rate while providing a 10-18 Code Error Rate (C.E.R.) Output
formatting is offset binary and the Low Voltage Differential
Signaling (LVDS) digital outputs are compatible with IEEE
1596.3-1996, with the exception of an adjustable common
mode voltage between 0.8V and 1.2V.
Each converter has a selectable output demultiplexer which
feeds two LVDS buses. If the 1:2 Demultiplexed Mode is se-
lected, the output data rate is reduced to half the input sample
rate on each bus. When Non-Demultiplexed Mode is select-
ed, the output data rate on channels DI and DQ is at the same
rate as the input sample clock. The two converters can be
interleaved and used as a single 3 GSPS ADC.
The converter typically consumes less than 3.5 mW in the
Power Down Mode and is available in a leaded or lead-free,
128-pin, thermally enhanced, exposed pad, LQFP and oper-
ates over the Industrial (-40°C TA +85°C) temperature
range.
Features
Single +1.9V ±0.1V Operation
Interleave Mode for 2x Sample Rate
Multiple ADC Synchronization Capability
Adjustment of Input Full-Scale Range, Clock Phase, and
Offset
Choice of SDR or DDR Output Clocking
1:1 or 1:2 Selectable Output Demux
Second DCLK Output
Duty Cycle Corrected Sample Clock
Test pattern
Key Specifications
Resolution
Max Conversion Rate
Code Error Rate
ENOB @ 748 MHz Input
DNL
Power Consumption (Non-DES Mode)
Operating in Non-demux Mode
Operating in 1:2 Demux Mode
Power Down Mode
8 Bits
1.5 GSPS (max)
10-18 (typ)
7.4 Bits (typ)
±0.15 LSB (typ)
1.6 W (typ)
2.0 W (typ)
3.5 mW (typ)
Applications
Direct RF Down Conversion
Digital Oscilloscopes
Satellite Set-top boxes
Communications Systems
Test Instrumentation
Ordering Information
Industrial Temperature Range (-40°C < TA < +85°C)
ADC08D1520CIYB
ADC08D1520CIYB/NOPB
ADC08D1520DEV
NS Package
Leaded 128-Pin Exposed Pad LQFP
Lead-free 128-Pin Exposed Pad LQFP
Development Board
© 2008 National Semiconductor Corporation 201931
www.national.com

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