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PDF EDGE629 Data sheet ( Hoja de datos )
| Número de pieza | EDGE629 | |
| Descripción | 1 GHz Timing Deskew and Quad Fanout Element | |
| Fabricantes | Semtech Corporation | |
| Logotipo |  |
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TESwTwwA.DNatDaShMeetE4UA.cSomUREMENT PRODUCTS
Description
Edge629
1 GHz Timing Deskew and Quad
Fanout Element
Featur es
The Edge629 is a monolithic timing delay and signal fanout • Fmax ≥ 1 GHz
solution manufactured in a high-performance bipolar pro- • Independent Falling Edge Adjust
cess. In Automatic Test Equipment (ATE) applications, the • Small Footprint (10 mm x 10 mm)
Edge629 buffers, distributes, and aligns timing signals • Excellent Timing Accuracy
across multiple channels (typically found inside Memory • Very Stable Timing Delays
Test Systems). It is also suitable for per pin deskew in • 5 ps Resolution
Logic Testers.
• ECL, CMOS Compatible Inputs
The Edge629 supports:
• Minimum pulse width = 330 ps with Falling
Edge Adjust disabled, 500 ps with Falling
Edge Adjust enabled
• Net usable delay span ≥ 4.0 ns
• Falling Edge Adjust ± 250 ps
• On Board DACs to generate 5 ps resolution
With a maximum operating frequency of 1 GHz, the
Edge629 is optimized for extremely high speed, high ac-
curacy testers, particularly those aimed to test memory
devices.
Functional Block Diagram
The Edge629 solves several difficult problems associated
with aligning multiple timing signals because it can:
• delay very narrow pulses over a long
timing span
• adjust the falling edge independently from the overall
propagation delay
• maintain extreme timing accuracy for very narrow
(sub-ns) pulses
• maintain tight timing accuracy over changes in
frequency, duty cycle, and pattern.
IN0 / IN0*
IN / IN*
IN1/ IN1*
∆T– ∆T
∆T
Coarse
Fine
∆T– ∆T
∆T
Coarse
Fine
OUT0 / OUT0*
OUT1 / OUT1*
Applications
• Memory Test Equipment
– Data Fanout
– Channel Deskew
• Logic Testers
– Per Pin Deskew
• Clock / Signal Fanout
IN2 / IN2*
IN3 / IN3*
SEL / SEL*
∆T– ∆T
∆T
Coarse
Fine
OUT2 / OUT2*
∆T– ∆T
∆T
Coarse
Fine
OUT3 / OUT3*
Revision 3 / August 1, 2005
1
www .semtech.com
1 page  
Edge629
TEST AND MEASUREMENT PRODUCTS
Circwuwwit.DDataeSshecert4ipU.tcioomn (continued)
Fine Delay
Fine Delay Select
Fine delay is accomplished using an analog delay cell and
an on-chip 6 bit DAC (see Figure 2). The fine delay range
is designed to be ~2X the coarse delay resolution.
Fine delay provides a total delay span of:
LSB 1 Fine LSB = 2.5 ps (see note)
2 Fine LSB = 5 ps
4 Fine LSB = 10 ps
8 Fine LSB = 20 ps
16 Fine LSB = 40 ps
MSP 32 Fine LSB = 80 ps
0 ns ≤ Fine Delay Range ≤ 157.5 ps.
The fine delay section may be selected or bypassed by a
multiplexer (see Figure 2). If SFD (Select Fine Delay) is
high, Fine Delay will be used. If SFD is low, Fine Delay will
be bypassed.
DAC Code
XXXXXX
000000
111111
SFD
0
1
1
Delay
Fine Delay Bypassed
Minimum Delay (0.0 ns)
Maximum Delay (157 ps)
Note: Because the transfer function is non-linear, some
LSB steps could be as large as 5 ps.
Each channel has its own unique delay setting and may
be programmed independently from all other channels.
The fine delay of any channel will not affect the coarse
delay of that channel, nor will it affect the overall delay of
any other channel.
Fine Delay DAC Outputs
DAC_FINE_(0–3) are analog voltage outputs from the on-
board DACs which program the fine delay elements of
each channel.
DAC_FINE_(0-3) pins are for test purposes only. Nothing
should be connected to these pins.
The propagation delay of a rising and falling edge will track
each other over the entire span of fine delay. (Adding or
subtracting fine delay will not cause pulse width distor-
tion.)
6 Bit DAC
∆T
SFD
Figure 2. Fine Delay Architecture
2005 Semtech Corp. Rev. 3, 8/1/05
5
www.semtech.com
5 Page 
TEST AND MEASUREMENT PRODUCTS
Pacwkwaw.gDeataSInhefeot4rUm.coamtion
64-Pin TQFP
10 mm x 10 mm x 1.4 mm
PIN Descriptions
D
D1
N
˚12 TYP.
EXPOSED HEATSINK
3.56 ± .50 DIA.
1
A2
A1
˚–A–
–B– E1
E
12 TYP.
Edge629
A
–D–
Top View
.20 RAD. TYP.
20 RAD. TYP.
A
.25
6˚±4˚
.17 MAX
θ
L
STANDOFF
A1
b
ddd M C A–B S D S
SEATING PLANE
–C–
LEAD COMPLANARITY
ccc C
Notes:
1. All dimensions in millimeters.
2. Dimensions shown are nominal with tolerances as
indicated.
3. L/F: EFTEC 64T copper or equivalent,
0.127mm (.005”) or 0.15mm (.006”) thick.
4. Foot length “L” is measured at gage plane, at 0.25
above the seating plane.
2005 Semtech Corp. Rev. 3, 8/1/05
11
Dims.
A
A1
A2
D
D1
E
E1
L
e
b
θ
ddd
ccc
Package Thickness
Footprint
Tolerance
MAX.
±.05
±.20
±.10
±.20
±.10
+.15 / –.10
BASIC
±.05
MAX.
MAX.
Value
1.60
.05 min. / .15 max
1.40
12.00
10.00
12.00
10.00
.60
.50
.22
0˚ - 7˚
.08
.08
1.40
Body + 2 mm
www.semtech.com
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| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet EDGE629.PDF ] | |
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