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PDF ICS83840 Data sheet ( Hoja de datos )

Número de pieza ICS83840
Descripción DDR SDRAM MUX
Fabricantes Integrated Circuit Systems 
Logotipo Integrated Circuit Systems Logotipo



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No Preview Available ! ICS83840 Hoja de datos, Descripción, Manual

Integrated
Circuit
Systems, Inc.
ICS83840
DDR SDRAM MUX
GENERAL DESCRIPTION
The ICS83840 is a DDR SDRAM MUX and is
ICS a member of the HiPerClock S™ family of High
HiPerClockS™ Performance Clock Solutions from ICS. The
device has 10 Host Lines and each host line can
be passed to 4 Data Ports. The 10 channels are
allocated as follows in the DDR SDRAM application: 8 data
lines, 1 strobe line and 1 DQm line. The Host/Data Ports are
compatible with single-ended SSTL-2 and the device oper-
www.DataSheeat4teUs.cformom a 2.5V supply.
Guaranteed low output skew makes the ICS83840 ideal for
demanding applications which require well defined perfor-
mance and repeatability.
FEATURES
40 low skew single-ended DIMM ports
4 SSTL-2 compatible enable inputs
Maximum Switching Speed: 3ns
Output skew: 120ps (maximum)
Bank skew: 45ps (maximum)
ron = 8(typical)
Full 2.5V supply modes
0°C to 70°C ambient operating temperature
Pin compatible with the CBTV4010
SIMPLIFIED SCHEMATIC
LOGIC DIAGRAM
HP0 RON
Sw
Sw
Sw
HPx nDPx
Sw
0DP0
1DP0
2DP0
3DP0
400
HP9 RON
Sw
0DP9
nSn Sw 1DP9
Sw 2DP9
Sw 3DP9
SW
nS0
nS1
nS2
PIN ASSIGNMENT
1
A VDD
B nS2
C nc
D
E 2DP9
F 1DP9
G 0DP9
H
J 1DP8
K 0DP8
L 3DP7
2
nS1
VDD
nS3
GND
3DP9
HP9
3DP8
2DP8
HP8
GND
2DP7
3
nc
nS0
HP7
1DP7
4
GND
0DP7
83840AH
nS3
5
1DP0
0DP0
3DP6
2DP6
6
2DP0
HP0
HP6
1DP6
7
3DP0
0DP1
GND
0DP6
8
1DP1
3DP5
9
2DP1
HP1
HP5
2DP5
10
3DP1
GND
HP2
3DP2
0DP3
HP3
GND
0DP4
HP4
3DP4
1DP5
www.icst.com/products/hiperclocks.html
1
11
0DP2
1DP2
2DP2
1DP3
2DP3
3DP3
1DP4
2DP4
0DP5
ICS83840
64-Ball TFBGA
7mm x 7mm x 1.2mm
package body
H Package
Top View
REV. A DECEMBER 22, 2003

1 page




ICS83840 pdf
Integrated
Circuit
Systems, Inc.
RELIABILITY INFORMATION
ICS83840
DDR SDRAM MUX
TABLE 6. θJAVS. AIR FLOW TABLE
www.DataSheet4U.com
θJA by Velocity (Millimeter Feet per Second)
01
Two-Layer PCB, JEDEC Standard Test Boards
50.04°C/W
43.18°C/W
2
41.17°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS83840 is: 320
83840AH
www.icst.com/products/hiperclocks.html
5
REV. A DECEMBER 22, 2003

5 Page










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