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PDF ICS8343I Data sheet ( Hoja de datos )

Número de pieza ICS8343I
Descripción LOW SKEW 1-TO-16 FANOUT BUFFER
Fabricantes Integrated Circuit Systems 
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Integrated
Circuit
Systems, Inc.
ICS8343I
LOW SKEW 1-TO-16
FANOUT BUFFER
GENERAL DESCRIPTION
The ICS8343I is a low skew, 1-to-16 Fanout
,&6 Buffer and a member of the HiPerClockS™ family
HiPerClockS™ of High Performance Clock Solutions from ICS.
The ICS8343I is at 5.0V, 3.3V, 2.5V and mixed
3.3V input and 2.5V supply modes over the com-
mercial temperature range. Guaranteed output and part-to-
part skew characteristics make the ICS8343I ideal for those
clock distribution applications demanding well defined per-
www.DataSheefto4rUm.caonmce and repeatability.
FEATURES
16 LVCMOS outputs
Output frequency up to 200MHz
250ps output skew
· 700ps part to part
CMOS compatible clock input at 5V, LVTTL and LVCMOS
compatible at 3.3V and 2.5V
LVTTL output enable inputs
Dual output enable inputs facilitates 1-to-16 or 1-to-8 input to
output modes
5.0V, 3.3V, 2.5V or mixed 3.3V, 2.5V from -40°C to 85°C
ambient operating temperature
32 lead low-profile QFP(LQFP), 7mm x 7mm x 1.4mm
package body, 0.8mm package lead pitch
BLOCK DIAGRAM
VDD1 VDD
VDD2
CLK
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
OE1
GND
OE2
PIN ASSIGNMENT
VDD1
VDD1
VDD1
Q3
Q4
GND
GND
GND
32 31 30 29 28 27 26 25
1 24
2 23
3 22
4 ICS8343I 21
5 20
6 19
7 18
8 17
9 10 11 12 13 14 15 16
VDD2
VDD2
VDD2
Q12
Q11
GND
GND
GND
32-Lead LQFP
Y package
Top View
8343I
www.icst.com/products/hiperclocks.html
1
REV. B MARCH 8, 2001

1 page




ICS8343I pdf
Integrated
Circuit
Systems, Inc.
ICS8343I
LOW SKEW 1-TO-16
FANOUT BUFFER
TABLE 4C. POWER SUPPLY DC CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V±5%, TA = -40° TO 85°C
Symbol
Parameter
VDD, VDD1, VDD2 Operating Supply Voltage
IDD Input Operating Supply Current
Test Conditions
Minimum
3.135
Typical
3.3
Maximum Units
3.465
V
100 µA
TABLE 4D. LVCMOS DC CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V±5%, TA = -40° TO 85°C
www.DataSheet4U.com
Symbol Parameter
Test Conditions
Minimum Typical
CLK
VIH Input High Voltage
OEx
VDD = 3.465V
VDD = 3.465V
2
2
CLK
VIL Input Low Voltage
OEx
VDD = 3.135V
VDD = 3.135V
-0.3
-0.3
IIH Input High Current CLK
VIN =VDD
OEx
VIN =VDD
IIL Input Low Current CLK
VIN = 0V
-15
OEx
VIN = 0V
-15
VOH Output High Voltage
VDD = 3.135V, IOH = -25mA
2.4
VOL
Output Low Voltage
VDD = 3.135V, IOL = 25mA
IOZH High Impedance Leakage Current
OEx = 0V, VOUT = VDD
IOZL High Impedance Leakage Current
OEx = 0V, VOUT = 0V
-1
Maximum
VDD + 0.3
VDD + 0.3
0.8
0.8
1
1
0.8
1
Units
V
V
V
V
µA
µA
µA
µA
V
V
µA
µA
TABLE 5B. AC CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V±5%, TA = -40° TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
fMAX Maximum Input Frequency
200
tpLH
Propagation Delay, Low-to-High
0 f 200MHz
1.0 2.1 3.1
tpHL
tsk(o)
Propagation Delay, High-to-Low
Output Skew; NOTE 3
tsk(pp) Part-to-Part Skew; NOTE 4
0 f 200MHz
Measured on rising edge
@VDDx/2
Measured on rising edge
@VDDx/2
1.1
2.0 2.8
250
700
tR Output Rise Time
0 f 200MHz
0.5 0.8
tF Output Fall Time
0 f 200MHz
0.9 1.7
tPW Output Pulse Width
tCYCLE/2
- 0.5
tCYCLE/2
tCYCLE/2
+ 0.5
NOTE 1: All parameters measured at fMAX unless noted otherwise.
NOTE 2: Outputs terminated with 50resistor connected to VDDx/2.
NOTE 3: Defined as skew across outputs at the same supply voltages and with equal load conditions.
NOTE 4: Defined as skew at different outputs on different devices operating at the same supply voltages
and with equal load conditions.
Units
MHz
ns
ns
ps
ps
ns
ns
ns
8343I
www.icst.com/products/hiperclocks.html
5
REV. B MARCH 8, 2001

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