DataSheetWiki


ADC08D500 fiches techniques PDF

National Semiconductor - 500 MSPS A/D Converter

Numéro de référence ADC08D500
Description 500 MSPS A/D Converter
Fabricant National Semiconductor 
Logo National Semiconductor 





1 Page

No Preview Available !





ADC08D500 fiche technique
May 2005
ADC08D500
High Performance, Low Power, Dual 8-Bit, 500 MSPS A/D
Converter
General Description
The ADC08D500 is a dual, low power, high performance
CMOS analog-to-digital converter that digitizes signals to 8
bits resolution at sampling rates up to 800 MSPS. Consum-
ing a typical 1.4 Watts at 500 MSPS from a single 1.9 Volt
supply, this device is guaranteed to have no missing codes
www.DataSheet4U.coovmer the full operating temperature range. The unique folding
and interpolating architecture, the fully differential compara-
tor design, the innovative design of the internal sample-and-
hold amplifier and the self-calibration scheme enable a very
flat response of all dynamic parameters beyond Nyquist,
producing a high 7.5 ENOB with a 250 MHz input signal and
a 500 MHz sample rate while providing a 10-18 B.E.R. Output
formatting is offset binary and the LVDS digital outputs are
compliant with IEEE 1596.3-1996, with the exception of an
adjustable common mode voltage between 0.8V and 1.2V.
Each converter has a 1:2 demultiplexer that feeds two LVDS
buses and reduces the output data rate on each bus to half
the sampling rate. The two converters can be interleaved
and used as a single 1 GSPS ADC.
The converter typically consumes less than 3.5 mW in the
Power Down Mode and is available in a 128-lead, thermally
enhanced exposed pad LQFP and operates over the Indus-
trial (-40˚C TA +85˚C) temperature range.
Features
n Internal Sample-and-Hold
n Single +1.9V ±0.1V Operation
n Choice of SDR or DDR output clocking
n Interleave Mode for 2x Sampling Rate
n Multiple ADC Synchronization Capability
n Guaranteed No Missing Codes
n Serial Interface for Extended Control
n Fine Adjustment of Input Full-Scale Range and Offset
n Duty Cycle Corrected Sample Clock
Key Specifications
n Resolution
n Max Conversion Rate
n Bit Error Rate
n ENOB @ 250 MHz Input
n DNL
n Power Consumption
— Operating
— Power Down Mode
8 Bits
500 MSPS (min)
10-18 (typ)
7.5 Bits (typ)
±0.15 LSB (typ)
1.4 W (typ)
3.5 mW (typ)
Applications
n Direct RF Down Conversion
n Digital Oscilloscopes
n Satellite Set-top boxes
n Communications Systems
n Test Instrumentation
Block Diagram
© 2005 National Semiconductor Corporation DS201214
20121453
www.national.com

PagesPages 30
Télécharger [ ADC08D500 ]


Fiche technique recommandé

No Description détaillée Fabricant
ADC08D500 500 MSPS A/D Converter National Semiconductor
National Semiconductor
ADC08D500 ADC08D500 High Performance Low Power Dual 8-Bit 500 MSPS A/D Converter (Rev. F) Texas Instruments
Texas Instruments
ADC08D502 ADC08D502 Hi Perf Low Power Dual 8-Bit 500 MSPS A/D Conv (Rev. A) Texas Instruments
Texas Instruments

US18650VTC5A

Lithium-Ion Battery

Sony
Sony
TSPC106

PCI Bus Bridge Memory Controller

ATMEL
ATMEL
TP9380

NPN SILICON RF POWER TRANSISTOR

Advanced Semiconductor
Advanced Semiconductor


www.DataSheetWiki.com    |   2020   |   Contactez-nous  |   Recherche