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PDF HCPL-M453 Data sheet ( Hoja de datos )

Número de pieza HCPL-M453
Descripción (HCPL-M452 / HCPL-M453) High Speed Optocouplers
Fabricantes Agilent 
Logotipo Agilent Logotipo



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No Preview Available ! HCPL-M453 Hoja de datos, Descripción, Manual

Small Outline, 5 Lead, High
Speed Optocouplers
Technical Data
www.DataSheet4U.com
HCPL-M452
HCPL-M453
Features
• Surface Mountable
• Very Small, Low Profile
JEDEC Registered
Package Outline
• Compatible with Infrared
Vapor Phase Reflow and
Wave Soldering Processes
• Very High Common Mode
Transient Immunity:
15000 V/µs at VCM = 1500 V
Guaranteed (HCPL-M453)
• High Speed: 1 Mb/s
• TTL Compatible
• Guaranteed AC and DC
Performance over
Temperature: 0°C to 70°C
• Open Collector Output
• Recognized Under the
Component Program of
U.L. (File No. E55361) for
Dielectric Withstand Proof
Test Voltage of 3750 Vac, 1
Minute
• Lead Free Option
Description
These small outline high CMR,
high speed, diode-transistor opto-
couplers are single channel
devices in a five lead miniature
footprint. They are electrically
equivalent to the following Agilent
optocouplers:
SO-5 Package
HCPL-M452
HCPL-M453
Standard DIP
HCPL-4502
HCPL-4503
SO-8 Package
HCPL-0452
HCPL-0453
(Note: These devices equivalent to 6N135/6N136 devices but without the base lead.)
The SO-5 JEDEC registered
(MO-155) package outline does
not require “through holes” in a
PCB. This package occupies
approximately one-fourth the
footprint area of the standard
dual-in-line package. The lead
profile is designed to be
compatible with standard
surface mount processes.
These diode-transistor
optocouplers use an insulating
layer between the light emitting
diode and an integrated photon
detector to provide electrical
insulation between input and
output. Separate connections for
the photodiode bias and output
transistor collector increase the
speed up to a hundred times
CAUTION: The small device geometries inherent to the design of this bipolar component increase the component's
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken
in handling and assembly of this component to prevent damage and/or degradation which may be induced by
ESD.

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HCPL-M453 pdf
5
Switching Specifications
Over recommended temperature (TA = 0°C to 70°C) VCC = 5 V, IF = 16 mA unless otherwise specified.
Parameter Symbol Device Min. Typ.* Max. Units Test Conditions
Fig. Note
Propagation
Delay Time
to Logic Low
at Output
tPHL
0.2 0.8
1.0
µs TA = 25°C
5, 6, 9
RL = 1.9 k10
Propagation
www.DataSheet4U.cDomelay Time
to Logic High
at Output
tPLH
0.6 0.8
1.0
TA = 25°C
5, 6, 9
RL = 1.9 k10
Common
Mode
Transient
Immunity at
Logic High
Level Output
|CMH|
HCPL-
M452
HCPL- 15
M453
1
30
kV/µs VCM = 10 Vp-p IF = 0 mA
TA = 25°C
RL = 1.9 k
VCM = 1500 Vp-p
11
8, 9
Common
Mode
Transient
Immunity at
Logic Low
Level Output
|CML|
HCPL-
M452
HCPL- 15
M453
1
30
VCM = 10 Vp-p IF = 16 mA
TA = 25°C
RL = 1.9 k
VCM = 1500 Vp-p
11
8, 9
Bandwidth
BW
3 MHz RL = 100 , See Test Circuit 8, 9 10
All typicals at TA = 25°C.
Notes:
1. Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C.
2. Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C.
3. Derate linearly above 85°C free-air temperature at a rate of 1.1 mW/°C.
4. Derate linearly above 85°C free-air temperature at a rate of 2.3 mW/°C.
5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input
current, IF, times 100.
6. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.
7. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 VRMS for 1 second
(leakage detection current limit, II-O 5 µA).
8. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the
common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode
transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode
pulse signal, VCM to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V).
9. The 1.9 kload represents 1 TTL unit load of 1.6 mA and the 5.6 kpull-up resistor.
10. The frequency at which the ac output voltage is 3 dB below its mid-frequency value.
11. Use of a 0.1 µF bypass capacitor connected between pins 4 and 6 is recommended.

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