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PDF AD7280 Data sheet ( Hoja de datos )
| Número de pieza | AD7280 | |
| Descripción | Lithium Ion Battery Monitoring System | |
| Fabricantes | Analog Devices | |
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Preliminary Technical Data
FEATURES
12-bit ADC, 1us per channel conversion time
6 Analog Input Channels, CM range 0.5V to 27.5V
6 Temperature Measurements Inputs.
On Chip Voltage Regulator
Cell Balancing Interface
Daisy Chain Interface
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Low Quiescent Current
High Input Impedance
Serial Interface with Alert Function
1 SPI interface for up to 300 channels
On Chip Registers for Channel Sequencing
VDD Operating Range 7.5V to 30V
Temperature Range -40 oC to 105oC
48 lead LQFP and LFCSP Packages
APPLICATIONS
Lithium Ion Battery Monitoring
Nickel Metal Hydride Battery Monitoring
GENERAL DESCRIPTION
The AD72801 contains all the functions required for general
purpose monitoring of stacked Lithium Ion batteries as used in
Hybrid Electric Vehicles. The part has multiplexed analog input
and temperature measurement channels for up to six cells of
battery management. An internal 3-ppm reference is provided
to drive the ADC. The ADC resolution is 12 bits with a 1 Msps
throughput rate offering a 1µs conversion time.
The AD7280 operates from just one VDD supply which has a
range of 7.5V to 30V (with an absolute max rating of 33V). The
part provides 6 pseudo differential analog input channels to
accommodate large common mode signals across the full VDD
range. Each channel allows an input signal range, Vin(+) --
Vin(-), of 0V to 5V. The input pins assume a series stack of 6
cells. In addition the part can accommodate 6 external sensors
for temperature measurement.
The AD7280 includes on chip registers which allow a sequence
of channel measurements to be programmed to suit the
applications requirements.
Lithium Ion Battery
Monitoring System
AD7280
FUNCTIONAL BLOCK DIAGRAM
VDD
Vin(6)
Vin(5)
Vin(4)
Vin(3)
Vin(2)
Vin(1)
Vin(0)
AD7280
MUX
VT(6)
VT(5)
VT(4)
VT(3)
VT(2)
VT(1)
VT TERM
VREF
CREF
REFGND
DAIS Y CHAIN
INTER FACE
++
--
CLOCK
2.5V
REF
CB1
CB6
CEL L
BALANCING
INTER FACE
REGUL ATOR
12 BIT ADC
CONTRO L LOGIC
& SELF TEST
LIMIT REG
SQN LOGIC
DATA MEMO RY
SPI INTER FACE
VREG
DGND
DVCC
AVCC
VDRIVE
SCLK
S D IN
SDOUT
ALERT
CS
PD
CNVST
MASTER
Figure 1
The AD7280 also includes an Alert function which generates an
interrupt output signal if the cell voltages exceed an upper or
lower limit defined by the user. The AD7280 has balancing
interface outputs designed to control external FET transistors to
allow discharging of individual cells.
The AD7280 includes a Built In Self Test feature which
internally applies a known voltage to the ADC inputs.
There is a daisy chain interface which allows up to 50 parts to
be stacked without the need for individual device isolation.
The AD7280 requires only one supply pin which takes 7mA
under normal operation, while converting at 1 Msps.
All this functionality is provided in a 48 pin LQFP or 48 pin
LFCSP package operating over a temperature range of −40°C to
+105°C.
1 Patents Pending
Rev. PrD
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
1 page  
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted
Table 3.
Parameter
VDD to AGND
VSS to AGND
Vin0 to Vin5 Voltage to AGND
Vin6 Voltage to AGND
CB1 Output to AGND
CB2 to CB6 Output to AGND
VT1 to VT6 Voltage to AGND
www.DataSheeAt4VUCC.ctoomAGND, DGND
DVCC to AVCC
DVCC to DGND
VDRIVE to AGND
AGND to DGND
Digital Input Voltage to DGND
Digital Output Voltage to GND
Operating Temperature Range
Storage Temperature Range
Junction Temperature
LQFP Package
θJA Thermal Impedance
θJC Thermal Impedance
LFCSP Package
θJA Thermal Impedance
θJC Thermal Impedance
Pb-free Temperature, Soldering
Reflow
Rating
−0.3 V to +33 V
−0.3 V to +0.3 V
VSS − 0.3 V to VDD + 0.3 V
VDD to VDD + 1 V
−0.3 V to DVCC + 0.3 V
−0.3 V to VDD + 0.3 V
−0.3 V to AVCC + 0.3 V
−0.3 V to +7 V
−0.3 V to +0.3 V
−0.3 V to +7 V
−0.3 V to DVCC
−0.3 V to +0.3 V
−0.3 V to VDRIVE + 0.3V
−0.3 V to VDRIVE + 0.3V
−40°C to +105°C
−65°C to +150°C
150°C
76.2°C/W
17°C/W
54°C/W
15°C/W
260(+0)°C
AD7280
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. PrD | Page 5 of 33
5 Page 
Preliminary Technical Data
AD7280
Vin6
Vin5
Vin4
Vin3
Vin2
Vin1
Vin0
ADC Vin+
ADC Vin-
Figure 5. MUX Configuration During Vin2-Vin1 Sampling
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The ADC is a 12-bit successive approximation analog-to-digital
converter. The converter is composed of a comparator, SAR,
some control logic and 2 capacitive DACs. Figure 6 shows a
simplified schematic of the converter. During the acquisition
phase switches SW1, SW2 and SW3 are closed. The sampling
capacitor array acquires the signal on the input during this
phase.
VIN+
VIN–
B CS
A SW1
A SW2
B CS
CAPACITIVE
DAC
COMPARATOR
SW3
CONTROL
LOGIC
CAPACITIVE
DAC
Figure 6. ADC Configuration During Acquisition Phase
When the ADC starts a conversion (Figure 7), SW3 opens and
SW1 and SW2 move to position B, causing the comparator to
become unbalanced. The control logic and capacitive DACs are
used to add and subtract fixed amounts of charge to bring the
comparator back into a balanced condition. When the
comparator is rebalanced, the conversion is complete. The
control logic generates the ADC output code. This output code
is then stored in the appropriate register for the input that has
been converted.
ANALOG INPUT STRUCTURE
Figure 8 shows the equivalent circuit of the analog input
structure of the AD7280. The two diodes provide ESD
protection. The resistors are lumped components made up of
the on-resistance of the input multiplexer and the track-and-
hold switch. The value of these resistors is typically about 300Ω.
Capacitor C1 can primarily be attributed to pin capacitance
while Capacitor C2 is the sampling capacitor of the ADC. The
total lumped capacitance of C1 and C2 is approximately 13 pF.
VDD
VIN+
D
C1 D
R1 C2
VSS
VDD
VIN–
D
C1 D
R1 C2
VSS
Figure 8. Equivalent Analog Input Circuit
TRANSFER FUNCTION
The output coding of the AD7280 is straight binary. The
designed code transitions occur at successive integer LSB values
(that is, 1 LSB, 2 LSB, and so on). The LSB size is dependent on
whether the voltage or temperature inputs are being measured.
The analog input range of the voltage inputs is 1V to 5V, the
analog input range of the temperature inputs is 0V to 5V. The
ideal transfer characteristic is shown in Figure 9.
Table 5. LSB Sizes for Each Analog Input Range
Selected
inputs
Input
Range
Full-Scale LSB Size
Range
Voltage
1 V to 5 V 4 V/4096 976 µV
Temperature 0 V to 5 V 5 V/4096 1.22 mV
VIN+
VIN–
B CS
A SW1
A SW2
B CS
CAPACITIVE
DAC
COMPARATOR
SW3
CONTROL
LOGIC
CAPACITIVE
DAC
Figure 7. ADC Configuration During Conversion Phase
111...111
111...110
111...000
011...111
000...010
000...001
000...000
Rev. PrD | Page 11 of 33
1V + 1LSB
AGND + 1LSB
5V – 1LSB
5V – 1LSB
ANALOG INPUT
4V INPUT RANGE
5V INPUT RANGE
Figure 9. Transfer Characteristic
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD7280.PDF ] | |
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