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PDF ADL5513 Data sheet ( Hoja de datos )
| Número de pieza | ADL5513 | |
| Descripción | 1 MHz to 4 GHz 80 dB Logarithmic Detector/Controller | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Preliminary Technical Data
1 MHz to 4 GHz, 80 dB
Logarithmic Detector/Controller
ADL5513
FEATURES
Wide bandwidth: 1 MHz to 4 GHz
80 dB dynamic range (±3 dB)
Stability over temperature: < ±0.5 dB
Low noise measurement/controller output (VOUT)
Pulse response time: 10 ns
Small footprint package: 3 mm x 3 mm LFCSP
www.DataSheeSt4uUp.pcolymoperation: 2.7 to 5.5 V at 30 mA
Fabricated using high speed SiGe process
APPLICATIONS
RF transmitter PA setpoint control and level monitoring
Power monitoring in radiolink transmitters
RSSI measurement in base stations, WLAN, WiMAX, radar
FUNCTIONAL BLOCK DIAGRAM
DET
VPOS 1
16
DET
15
DET
14 13
DET
DET Σ
IV
12 V O U T
IN HI 2
IN LO 3
AD L5513
I V 11 V S E T
10 COMM
VPOS 4
SLOPE
CONTROL
5
6
BAND GAP
RE FE RENC E
7
Figure 1.
G AIN
BIAS
8
9 TADJ
GENERAL DESCRIPTION
The ADL5513 is a demodulating logarithmic amplifier, capable
of accurately converting an RF input signal to a corresponding
decibel-scaled output. It employs the progressive compression
technique over a cascaded amplifier chain, each stage of which
is equipped with a detector cell. The device can be used in
either measurement or controller modes. The ADL5513
maintains accurate log conformance for signals greater than 4
GHz. The input dynamic range is typically 80 dB (re: 50 Ω)
with error less than ±3 dB. The ADL5513 has 10 ns response
time which enables RF burst detection to a pulse rate of beyond
50 MHz. The device provides unprecedented logarithmic
intercept stability vs. ambient temperature conditions. A supply
of 2.7 V to 5.5 V is required to power the device. Current
consumption is less than 30 mA, and decreases to TBD μA
when the device is disabled.
The ADL5513 can be configured to provide a control voltage to
a power amplifier or a measurement output from the VOUT
pin. Because the output can be used for controller applications,
special attention has been paid to minimize wideband noise. In
this mode, the setpoint control voltage is applied to the VSET
pin.
The feedback loop through an RF amplifier is closed via VOUT,
the output of which regulates the amplifier’s output to a
magnitude corresponding to VSET. The ADL5513 provides 0 V
to (VPOS − 0.1 V) output capability at the VOUT pin, suitable for
controller applications. As a measurement device, VOUT is
externally connected to VSET to produce an output voltage
VOUT that increases linear-in-dB with RF input signal amplitude.
The logarithmic slope is 20 mV/dB, determined by the VSET
interface. The intercept is -95 dBm (re: 50 Ω, CW input, 900
MHz) using the INHI input. These parameters are very stable
against supply and temperature variations.
Rev. PrA 6/08
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
1 page  
Preliminary Technical Data
Parameter
3.6 GHz
Output Voltage: High Power in
Output Voltage: Low Power in
±3.0 dB Dynamic Range
±1.0 dB Dynamic Range
±0.5 dB Dynamic Range
Maximum Input Level, ±1.0 dB
Minimum Input Level, ±1.0 dB
Deviation vs. Temperature
www.DataSheet4U.com
Logarithmic Slope
Logarithmic Intercept
Input Impedance
SETPOINT INPUT
Voltage Range
Current Limit Source/Sink
OUTPUT INTERFACE
Rise Time
Fall Time
POWER SUPPLY INTERFACE
Supply Voltage
Quiescent Current
Supply Current
POWER-DOWN INTERFACE
Logic Level Threshold
Enable Time
Disable Time
Conditions
PIN = -10 dBm,
PIN = -60 dBm
CW input, TA = +25°C
CW input, TA = +25°C
CW input, TA = +25°
Deviation from output at 25°C
-40°C < TA < +85°C; PIN = -10 dBm
-40°C < TA < +85°C; PIN = −30 dBm
-40°C < TA < +85°C; PIN = -50 dBm
-40°C < TA < +125°C; PIN = -10 dBm
-40°C < TA < +125°C; PIN = − 30 dBm
-40°C < TA < +125°C; PIN = -50 dBm
Pin VSET
Log conformance error ≤1 dB Min
Log conformance error ≤1 dB Max
1% change
Input level = no signal to −10dBm, 10% to 90% CLPF = 10 pF
Input level = no signal to −10dBm, 10% to 90% CLPF = 10 pF
Pin VPOS
25C RF in =-55 dBm
When disabled
Pin PWDN
Logic LO enables Logic HI disables
PWDN LO to OUT at 100% final value,
CLPF = 10pF, RF in = −10 dBm
PWDN HI to OUT at 10% final value,
CLPF = 10pF, RF in = −10 dBm
ADL5513
Min Typ
Max Unit
1.6 V
0.6 V
78 dB
71 dB
66 dB
5
-66
±0.64
±0.64
±0.62
±0.856
±0.926
±0.937
21
-90.57
TBD
dB
dB
dB
dB
dB
dB
mV/dB
dBm
Ω/pF
TBD V
TBD
TBD mA
10 nS
20 nS
2.7 5
30
TBD
5.5 V
mA
μA
VPOS − 0.7 V
143
100
V
ns
ns
Rev. PrA | Page 5 of 12
5 Page 
Preliminary Technical Data
ADL5513
www.DataSheet4U.com
RFIN
R1
52.3 ohms
VPOS
VPOS
C3
0.1 uF
GND
VOUT_ALT
R11
C4 0 ohms
C7
1000 pF
R2
open
C1
47nF
100 pF
C2
47nF
VPOS
VPOS
VOUT
1 12
2 INHI
VSET 11
ADL5513
3 INLO
COMM1` 0
49
TADJ
R5
open
R3
1k
R4
0 ohms
R10
0 ohms
CL
open
VOUT
RL
open
VSET
C5
100 pF
Z1
R12
0 ohms
C6
VPOS 0.1 uF
R7
0 ohms
R6
open
VPOS
TADJ
R8
open
TADJ
R9
open
EXT_ PWDN - TADJ
Figure 15. Evaluation Board Schematic
Figure 16.Component Side Layout
Figure 17. Component Side Silkscreen
Rev. PrA | Page 11 of 12
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ADL5513.PDF ] | |
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