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PDF UT54ACTS157 Data sheet ( Hoja de datos )

Número de pieza UT54ACTS157
Descripción Quadrouple 2 to 1 Multiplexers
Fabricantes ETC 
Logotipo ETC Logotipo



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UT54ACS157/UT54ACTS157
Radiation-Hardened
Quadruple 2 to 1 Multiplexers
FEATURES
• radiation-hardened CMOS
- Latchup immune
• High speed
• Low power consumption
www.DataSheet4SUin.cgolme 5 volt supply
• Available QML Q or V processes
• Flexible package
- 16-pin DIP
- 16-lead flatpack
DESCRIPTION
The UT54ACS157 and the UT54ACTS157 are monolithic data
selectors/multiplexers. A 4-bit word is selected from one of two
sources and is routed to the four outputs. A separate strobe
input, G, is provided.
The devices are characterized over full military temperature
range of -55 C to +125 C.
FUNCTION TABLE
INPUTS
OUTPUT
STROBE
G
H
L
L
L
L
SELECT
A/B
X
L
L
H
H
DATA
AB
XX
LX
HX
XL
XH
Y
L
L
H
L
H
PINOUTS
A/B
A1
B1
Y1
A2
B2
Y2
VSS
16-Pin DIP
Top View
A/B 1 16 VDD
A1 2 15 G
B1 3 14 A4
Y1 4 13 B4
A2 5 12 Y4
B2 6 11 A3
Y2 7 10 B3
VSS 8
9 Y3
16-Lead Flatpack
Top View
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
VDD
G
A4
B4
Y4
A3
B3
Y3
LOGIC SYMBOL
(15)
G
(1)
A/B
(2)
A1
(3)
B1
(5)
A2
(6)
B2
(11)
A3
(10)
B3
(14)
A4
(13)
B4
EN
G1
1 MUX
1
(4) Y1
(7) Y2
(9) Y3
(12) Y4
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
95 RadHard MSI Logic

1 page




UT54ACTS157 pdf
UT54ACS157/UT54ACTS157
Notes:
1.Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%,
- 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltag within the above specified range, but are
guaranteed to VIH(min) and VIL(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed
3,765 pF/MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS
at frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose 1E6 rads(Si).
8. Power does not include power contribution of any TTL output sink current.
9. Power dissipation specified per switching output.
10. This value is guaranteed based on characterization data, but not tested.
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99 RadHard MSI Logic

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