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PDF SC420A Data sheet ( Hoja de datos )
| Número de pieza | SC420A | |
| Descripción | Synchronous Power MOSFET Driver | |
| Fabricantes | Semtech Corporation | |
| Logotipo |  |
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POWER MANAGEMENT
Description
SC420A
High Speed, Combi-SenseTM, Synchronous
Power MOSFET Driver for Mobile Applications
Features
The SC420A is a cost effective Dual MOSFET Driver, in-
corporating Semtech’s patented Combi-SenseTM technol-
ogy, designed for switching High and Low side Power
MPOOSWFEETRs inMSAteNp-AdoGwEnMSwEiNtcThing regulators. A 30ns max
propagation delay from input transition to the gate of
www.DatthaSehpeeotw4Ue.croFmET’s guarantees operation at high switching
frequencies. Internal overlap protection circuit prevents
shoot-through from Vin to GND in the main and synchro-
nous MOSFETs.
High current drive capability allows fast switching, thus
reducing switching losses at high frequencies without
causing thermal stress on the driver.
The high voltage CMOS process allows operation up to
27 Volts, making the SC420A suitable for adaptor pow-
ered applications. Under-voltage-lockout and over-tem-
perature shutdown features are included for proper and
safe operation. The SC420A is offered in a space saving
MLP-12 package.
u High efficiency
u Shutdown mode for increased power saving
u Fast rise and fall times (10ns typical with 3000pF
load)
u 5V gate drive
u Ultra-low (<30ns) propagation delay (BG going low)
u Adaptive and programmable non-overlapping gate
drives provide shoot-through protection
u Floating top drive switches up to 27V
u High frequency operation allows use of small
inductors and low cost ceramic capacitors
u Under-voltage lockout
u Low quiescent current
u MLP packaging provides superior thermal perfor-
mance in a small footprint
Applications
u High efficiency portable and notebook computers
u Battery powered applications
Conceptual Application Circuit
VIN2
VIN
VIN
PWM
FB Combi-Sense TM
Controller IC
EN GND CS- CS+
D1
VIN2
VIN
CO
SC420A
EN
CDELAY
VPN
TG
BST
DRN
BG
CDELAY
RVPN
CVPN
M1
CBST
L1
VOUT
CL
M2
Revision: April 1, 2004
Figure 1
1
United States Patent No. 6,441,597
www.semtech.com
1 page  
SC420A
POWER MANAGEMENT
Pin Configuration
Top View
12 11 10
TG 1
www.DataSheet4U.com
BST 2
CO 3
45 6
9 BG
8 VIN
7 CDELAY
Ordering Information
Device (1)
SC420AIMLTRT(3)
Package
MLP-12
Temp Range (TJ)
-40° to 125°C
Note:
(1) Only available in tape and reel packaging. A reel
contains 3000 devices.
(2) This device is ESD sensitive. Use of standard ESD
handling precautions is required.
(3) Lead Free package compliant with J-STD-020B.
Qualified to support maximum IR reflow temperature of
260oC for 30 seconds.
(MLP-12)
Pin Descriptions
Pin Pin
# Name
Pin Function
1 TG Output gate drive for the switching (high-side) MOSFET.
2
BST
Bootstrap pin. A capacitor is connected between BST and DRN pins to develop the floating bootstrap
voltage for the high-side MOSFET. The capacitor value is typically between 0.1µF and 1µF (ceramic).
3 CO Logic level PWM input signal to the SC420 supplied by external controller.
4
VIN2
Input power (VBAT) to the DC/DC converter. Used as supply reference for internal Combi-Sense TM
circuitry. Connect as close as possible to Drain of TOP switching MOSFET.
5
EN
Active high logic level input signal. A logic High enables TG and BG switching. A low level disables
outputs and reduces quiescent current to IQ SD
6
VPN
Virtual Phase Node. Connect an RC between this pin and the output sense point to Enable Combi-
Sense TM operation.
The capacitance connected between this pin and GND sets the additional propagation delay for BG
7 CDELAY going low to TG going high. Total propagation delay =20ns + 1ns/pF. If no capacitor is connected, the
propragation delay = 20ns.
8
VIN
Input supply for the bottom drive and the Logic. A 1µF-10µF Ceramic Capacitor must be connected
from this pin to PGND, placed less than 0.5" from SC420.
9 BG Output drive for the synchronous (bottom) MOSFET.
10 PGND Ground. Keep this pin close to the synchronous MOSFETs source.
11 N.C. No Connect
12
DRN
This pin connects to the junction of the switching and synchronous MOSFETs . This pin can be subjected
to a -2V minimum relative to PGND without affecting operation.
© 2004 Semtech Corp.
5 United States Patent No. 6,441,597
www.semtech.com
5 Page 
SC420A
POWER MANAGEMENT
Applications Information (Cont.)
COMPONENT SELECTION FOR SC420A APPLICATION:
Top Gate Resistor (Rtg)
High Side MOSFET (LSFET)
The SC420A is usually used for low duty cycle ( ~ 10% )
applications. So the Rds (ON) of the high side MOSFET is
not a parameter of significant importance. A 10 – 25
www.DamtaSÙheRedt4sU.fcoormthe HSFET is acceptable depending on the
load current. Minimum Qg for the HSFET is important for
component selection. Typical range is 10 – 25 nC.
Low Side MOSFET (LSFET)
TG resistance is not generally required, as Rbst can take
care of the rising edge. We recommend one Rtg for each
HSFET only when the maximum length of the TG trace > 2
inches. Populate with 0 Ω initially.
Boost Diode (Dbst)
Boost Diode as shown in the above figure is required and
should have a very low forward voltage drop. This increases
the amount of charge on Cbst capacitor.
Rds is the critical selection parameter for LSFET. IT should
be as low as possible for reduction of conduction losses
and hence increase efficiency. Typical range is 1 – 3 mÙ.
Rg is another important parameter for LSFET. It should
be as low as possible as this will give better efficiency.
Typical range 0.1 – 2 Ω. Ratio of Qgd/Qgs is third
parameter of consideration.
Delay Capacitor (Cdly)
Delay capacitor is not added in a typical application. This
option is useful to control the delay between the BG falling
and TG rising edges. Cdly is used for very high capacitance
LSFETs to ensure BG is below Vth of the FET before TG
turns on.
As the duty cycle for the application increases, require-
ments for the two FETs become more similar; however,
switching charge will always be more important to the
HSFET since it switches into the full voltage, and the LSFET
always switching into the near zero voltage.
Boost Capacitor (Cbst)
Decoupling capacitors (C1,C3)
These are de-coupling capacitors present in the circuit.
Place as close to SC420A as possible. Typical rating is 1uF/
10V for C1 and 0.1uF /25V for C3.
Boost capacitor is important for SC420A application as
shown in the above figure. It is a good design rule to have
boost capacitance at least 100 X the Cgs for the HSFET.
Boost Resistor (Rbst)
Boost resistance is important and depends on the layout.
We recommend always designing with the resistor as shown
in the above circuit to help minimize EMI when the HSFET
turns on. The value required is layout dependant.
Bottom Gate Resistor (Rbg)
BG resistance is normally not required, but may be needed
for damping for long BG trace runs. We recommend one
Rbg for each LSFET only when the maximum length of the
BG trace is > 1 inch. Populate with 0 Ω initially.
© 2004 Semtech Corp.
11 United States Patent No. 6,441,597
www.semtech.com
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet SC420A.PDF ] | |
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