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PDF LH1694 Data sheet ( Hoja de datos )
| Número de pieza | LH1694 | |
| Descripción | 256-output TFT-LCD Gate Driver IC | |
| Fabricantes | Sharp Electrionic Components | |
| Logotipo |  |
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LH1694
LH1694
DESCRIPTION
The LH1694 is a 256-output TFT-LCD gate driver
IC.
FEATURES
• Number of LCD drive outputs : 256
• LCD drive output sequence :
Output shift direction can be selected
OG1/OG256 or OG256/OG1
• Enable chain connection
• Usable with both positive/negative power supplies
• Output signal masking function
• Input signal voltage : +2.7 to +3.6 V
• LCD drive voltage : +16.0 to +42.0 V
• Operating temperature : –30 to +85 ˚C
• Package : 277-pin TCP (Tape Carrier Package)
256-output TFT-LCD Gate Driver IC
PIN CONNECTIONS
277-PIN TCP
TOP VIEW
VDD 277
VEE 276
VSS 275
VCC 274
VLS 273
GND 272
SVIO 271
R/L 270
CKV 269
OE1 268
OE2 267
OE3 266
SVOI 265
GND 264
TEST2 263
TEST1 262
VLS 261
VCC 260
VSS 259
VEE 258
VDD 257
NOTE :
Doesn't prescribe TCP outline.
1 OG1
2 OG2
3 OG3
254 OG254
255 OG255
256 OG256
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in
catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
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Functional Operations
LH1694 can select the LCD drive output level (OG1
to OG256) by the set of the input signal (CKV,
SVIO, SVOI, OE1, OE2, OE3).
When the pin for selecting the bi-directional shift
register (R/L) is set to "H", LCD drive outputs shift
from OG1 to OG256, and when set to "L", LCD
drive outputs shift from OG256 to OG1.
OE1,OE2 and OE3 are signals for output-enable.
Output pins output non-selecting data (VEE level)
when OE1 to OE3 pins are set to "H" and it has no
relation with input clock.
While R/L = "H" input data from SVIO is read at the
rising edge of shift clock (CKV), and outputs to
LCD drive output pin OG1 at the width for one
Example of Input/Output Timing (R/L = "H")
CKV
SVIO
(Input)
OE1
12345
OE2
OE3
OG1
OG2
OG3
OG4
OG5
OG6
•••••
OG256
SVIO
(Output)
LH1694
cycle of shift clock. Next LCD drive output pins from
OG2 to OG256 are sequentially shifted at the rising
edge of the CKV for one cycle. Shift signal of
OG256 is read at the falling edge of the clock
signal, and the input data for the next cascade is
output from the SVOI pin.
While R/L = "L" input data from SVOI is read at the
rising edge of shift clock (CKV), and outputs to LCD
drive output pin OG256 at the width for one cycle of
shift clock. Next LCD drive output pins from OG255 to
OG1 are sequentially shifted at the rising edge of the
CKV for one cycle. Shift signal of OG1 is read at the
falling edge of the clock signal and the input data for
the next cascade is output from the SVIO pin.
67
255 256 257 258
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5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet LH1694.PDF ] | |
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