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TC74HC123AF fiches techniques PDF

Toshiba - DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR

Numéro de référence TC74HC123AF
Description DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR
Fabricant Toshiba 
Logo Toshiba 





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TC74HC123AF fiche technique
TC74HC123AP/AF/AFN
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC123AP,TC74HC123AF,TC74HC123AFN
Dual Retriggerable Monostable Multivibrator
The TC74HC123A is a high speed CMOS MONOSTABLE
MULTIVIBRATOR fabricated with silicon gate C2MOS
technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
There are two trigger inputs, A input (negative edge), and B
input (positive edge). These inputs are valid for a slow rise/fall
time signal (tr = tf = 1 s) as they are schmitt trigger inputs. This
device may also be triggered by using CLR input (positive
edge).
After triggering, the output stays in a MONOSTABLE state for
a time period determined by the external resistor and capacitor
(Rx, Cx ). A low level at the CLR input breaks this state. In the
MONOSTABLE state, if a new trigger is applied, it extends the
MONOSTABLE period (retrigger mode).
Limits for Cx and Rx are:
External capacitor, Cx: No limit
External resistor, Rx: VCC = 2.0 V more than 5 k
VCC 3.0 V more than 1 k
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74HC123AP
TC74HC123AF
TC74HC123AFN
Features (Note)
High speed: tpd = 25 ns (typ.) at VCC = 5 V
Low power dissipation
Standby state: ICC = 4 μA (max) at Ta = 25°C
Active state: ICC = 700 μA (max) at Ta = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (min)
Output drive capability: 10 LSTTL loads
Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
Balanced propagation delays: tpLH ∼− tpHL
Wide operating voltage range: VCC (opr) = 2 to 6 V
Pin and function compatible with 74LS123
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
SOL16-P-150-1.27
: 1.00 g (typ.)
: 0.18 g (typ.)
: 0.13 g (typ.)
Note: In the case of using only one circuit, CLR should be tied to GND, Rx/CxCxQQ should be tied to OPEN,
the other inputs should be tied to VCC or GND.
1 2007-10-01

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