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Número de pieza | W29C102 | |
Descripción | 64K 16 CMOS FLASH MEMORY | |
Fabricantes | Winbond | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de W29C102 (archivo pdf) en la parte inferior de esta página. Total 21 Páginas | ||
No Preview Available ! W29C102
64K × 16 CMOS FLASH MEMORY
GENERAL DESCRIPTION
The W29C102 is a 1-megabit, 5-volt only CMOS flash memory organized as 64K × 16 bits. The
device can be programmed and erased in-system with a standard 5V power supply. A 12-volt VPP is
not required. The unique cell architecture of the W29C102 results in fast program/erase operations
www.DataSheet4U.comwith extremely low current consumption (compared to other comparable 5-volt flash memory
products). The device can also be programmed and erased using standard EPROM programmers.
FEATURES
• Single 5-volt program and erase operations
• Fast page-write operations
− 128 words per page
− Page program cycle: 10 mS (max.)
− Effective word-program cycle time: 39 µS
− Optional software-protected data write
• Fast chip-erase operation: 50 mS
• Read access time: 70/90/120 nS
• Typical page program/erase cycles: 1K/10K
• Ten-year data retention
• Software and hardware data protection
• Low power consumption
− Active current: 25 mA (typ.)
− Standby current: 20 µA (typ.)
• Automatic program timing with internal VPP
generation
• End of program detection
− Toggle bit
− Data polling
• Latched address and data
• TTL compatible I/O
• JEDEC standard word-wide pinouts
• Available packages: 40-pin 600 mil DIP, TSOP
and 44-pin PLCC
Publication Release Date: March 1998
- 1 - Revision A3
1 page W29C102
TABLE OF OPERATING MODES
Operating Mode Selection
(VHH = 12V)
MODE
PINS
CE OE WE
ADDRESS
Read
www.DataSheet4U.com
Write
VIL VIL VIH AIN
VIL VIH VIL AIN
Standby
VIH X X X
Write Inhibit
X VIL X X
X X VIH X
Output Disable
X VIH X X
5-Volt Software Chip Erase VIL VIH VIL AIN
Product ID
VIL VIL VIH A0 = VIL; A1−A15 = VIL;
A9 = VHH
VIL VIL VIH A0 = VIH; A1−A15 = VIL;
A9 = VHH
DQ.
Dout
Din
High Z
High Z/DOUT
High Z/DOUT
High Z
DIN
Manufacturer Code
00DA (Hex)
Device Code
004F (Hex)
Publication Release Date: March 1998
- 5 - Revision A3
5 Page W29C102
AC Characteristics, continued
Read Cycle Timing Parameters
(VDD = 5.0V ±10%, VSS = 0V, TA = 0 to 70° C)
PARAMETER
SYM. W29C102-70 W29C102-90 W29C102-12 UNIT
MIN. MAX. MIN. MAX. MIN. MAX.
Read Cycle Time
www.DataSheet4U.comChip Enable Access Time
TRC 70 - 90 - 120 - nS
TCE - 70 - 90 - 120 nS
Address Access Time
TAA - 70 - 90 - 120 nS
Output Enable Access Time
TOE
-
35
-
45
-
60 nS
CE High to High-Z Output
TCHZ
-
25
-
25
-
30 nS
OE High to High-Z Output
TOHZ
-
25
-
25
-
30 nS
Output Hold from Address Change TOH 0 - 0 - 0 - nS
Byte/Page-write Cycle Timing Parameters
PARAMETER
SYMBOL
Write Cycle (erase and program)
TWC
Address Setup Time
TAS
Address Hold Time
TAH
WE and CE Setup Time
TCS
WE and CE Hold Time
TCH
OE High Setup Time
TOES
OE High Hold Time
TOEH
CE Pulse Width
TCP
WE Pulse Width
TWP
WE High Width
TWPH
Data Setup Time
TDS
Data Hold Time
TDH
Byte Load Cycle Time
TBLC
MIN.
-
0
50
0
0
0
0
70
70
100
50
0
-
TYP.
-
-
-
-
-
-
-
-
-
-
-
-
-
Notes:
All AC timing signals observe the following guidelines for determining setup and hold times:
(a) High level signal's reference level is VIH.
(b) Low level signal's reference level is VIL.
MAX.
10
-
-
-
-
-
-
-
-
-
-
-
150
UNIT
mS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
µS
- 11 -
Publication Release Date: March 1998
Revision A3
11 Page |
Páginas | Total 21 Páginas | |
PDF Descargar | [ Datasheet W29C102.PDF ] |
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