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PDF L6599 Data sheet ( Hoja de datos )
| Número de pieza | L6599 | |
| Descripción | High-voltage resonant controller | |
| Fabricantes | STMicroelectronics | |
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L6599
High-voltage resonant controller
Not for new design
Features
■ 50 % duty cycle, variable frequency control of
resonant half-bridge
■ High-accuracy oscillator
■ Up to 500 kHz operating frequency
■ Two-level OCP: frequency-shift and latched
shutdown
■ Interface with PFC controller
■ Latched disable input
■ Burst-mode operation at light load
■ Input for power-ON/OFF sequencing or
brownout protection
■ Non-linear soft-start for monotonic output
voltage rise
■ 600 V-rail compatible high-side gate driver with
integrated bootstrap diode and high dV/dt
immunity
■ -300/800 mA high-side and low-side gate
drivers with UVLO pull-down
■ DIP-16, SO-16N packages
Figure 1. Block diagram
DIP-16
SO-16N
Table 1. Order code
Order codes
Package
L6599D
SO-16N
L6599DTR
SO-16N
L6599N
DIP-16
Packaging
Tube
Tape and reel
Tube
Applications
■ LCD and PDP TV
■ Desktop PC, entry-level server
■ Telecom SMPS
■ AC-DC adapter, open frame SMPS
DIS 8 DISABLE
+
1.85V -
STBY 5
1.25V
UVLO
-
+
Ifmin
RFmin 4
+
-
Css 1
CF 3
VCO
SQ
R
DIS
STANDBY
Vcc
12
17V
2V
CONTROL
LOGIC
2
UV
DETECTION
UVLO
SYNCHRONOUS
BOOTSTRAP DIODE
DEAD
TIME
DRIVING
LOGIC
HVG
DRIVER
LEVEL
SHIFTER
LVG DRIVER
ISEN_DIS
QS
R
6.3V 1.25V
15
µA
7
-
+
UVLO
+
-
+
-
LINE_OK
ISEN_DIS
DIS
STANDBY
1.5V
0.8V
Vs
DELAY
LINE
H.V.
16 VBOOT
15 HVG
14
OUT
11 LVG
10
GND
6 ISEN
9 PFC_STOP
CBOOT
LC TANK
CIRCUIT
February 2009
Rev 3
This is information on a product still in production but not recommended for new designs.
1/36
www.st.com
36
1 page  
L6599
Pin settings
Table 2. Pin functions (continued)
N. Name
Function
Minimum oscillator frequency setting. This pin provides a precise 2 V reference and a
resistor connected from this pin to GND defines a current that is used to set the minimum
oscillator frequency. To close the feedback loop that regulates the converter output voltage
4 RFmin by modulating the oscillator frequency, the phototransistor of an optocoupler will be
connected to this pin through a resistor. The value of this resistor will set the maximum
operating frequency. An R-C series connected from this pin to GND sets frequency shift at
start-up to prevent excessive energy inrush (soft-start).
Burst-mode operation threshold. The pin senses some voltage related to the feedback
control, which is compared to an internal reference (1.25 V). If the voltage on the pin is lower
than the reference, the IC enters an idle state and its quiescent current is reduced. The chip
5 STBY restarts switching as the voltage exceeds the reference by 50 mV. Soft-start is not invoked.
This function realizes burst-mode operation when the load falls below a level that can be
programmed by properly choosing the resistor connecting the optocoupler to pin RFmin (see
block diagram). Tie the pin to RFmin if burst-mode is not used.
Current sense input. The pin senses the primary current though a sense resistor or a
capacitive divider for lossless sensing. This input is not intended for a cycle-by-cycle control;
hence the voltage signal must be filtered to get average current information. As the voltage
exceeds a 0.8 V threshold (with 50 mV hysteresis), the soft-start capacitor connected to pin
1 is internally discharged: the frequency increases hence limiting the power throughput.
6
ISEN
Under output short circuit, this normally results in a nearly constant peak primary current.
This condition is allowed for a maximum time set at pin 2. If the current keeps on building up
despite this frequency increase, a second comparator referenced at 1.5 V latches the device
off and brings its consumption almost to a “before start-up” level. The information is latched
and it is necessary to recycle the supply voltage of the IC to enable it to restart: the latch is
removed as the voltage on the Vcc pin goes below the UVLO threshold. Tie the pin to GND if
the function is not used.
Line sensing input. The pin is to be connected to the high-voltage input bus with a resistor
divider to perform either AC or DC (in systems with PFC) brownout protection. A voltage
below 1.25 V shuts down (not latched) the IC, lowers its consumption and discharges the
soft-start capacitor. IC’s operation is re-enabled (soft-started) as the voltage exceeds 1.25 V.
7 LINE The comparator is provided with current hysteresis: an internal 15 µA current generator is
ON as long as the voltage applied at the pin is below 1.25 V and is OFF if this value is
exceeded. Bypass the pin with a capacitor to GND to reduce noise pick-up. The voltage on
the pin is top-limited by an internal zener. Activating the zener causes the IC to shut down
(not latched). Bias the pin between 1.25 and 6 V if the function is not used.
Latched device shutdown. Internally the pin connects a comparator that, when the voltage
on the pin exceeds 1.85 V, shuts the IC down and brings its consumption almost to a “before
8 DIS start-up” level. The information is latched and it is necessary to recycle the supply voltage of
the IC to enable it to restart: the latch is removed as the voltage on the VCC pin goes below
the UVLO threshold. Tie the pin to GND if the function is not used.
Open-drain ON/OFF control of PFC controller. This pin, normally open, is intended for
stopping the PFC controller, for protection purpose or during burst-mode operation. It goes
9
PFC_STOP
low when the IC is shut down by DIS > 1.85 V, ISEN > 1.5 V, LINE > 6 V and STBY < 1.25 V.
The pin is pulled low also when the voltage on pin DELAY exceeds 2V and goes back open
as the voltage falls below 0.3V. During UVLO, it is open. Leave the pin unconnected if not
used.
Chip ground. Current return for both the low-side gate-drive current and the bias current of
10 GND the IC. All of the ground connections of the bias components should be tied to a track going
to this pin and kept separate from any pulsed current return.
5/36
5 Page 
L6599
6 Typical electrical performance
Typical electrical performance
Figure 4. Device consumption vs supply
voltage
Figure 5. IC consumption vs
junction temperature
Figure 6. VCC clamp voltage vs
junction temperature
Figure 7. UVLO thresholds vs
junction temperature
11/36
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet L6599.PDF ] | |
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