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Integrated Device Technology - 3.3V CMOS 16-BIT BUS TRANSCEIVER

Numéro de référence IDT74LVCHR162245A
Description 3.3V CMOS 16-BIT BUS TRANSCEIVER
Fabricant Integrated Device Technology 
Logo Integrated Device Technology 





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IDT74LVCHR162245A fiche technique
IDT74LVCHR162245A
3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIALTEMPERATURERANGE
3.3V CMOS 16-BIT
IDT74LVCHR162245A
BUS TRANSCEIVER
WITH 3 STATE OUTPUTS,
5 VOLT TOLERANT I/O, BUS-HOLD
FEATURES:
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
www.DataShAeellt4inUp.cuotsm, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP, TSSOP, and TVSOP packages
DRIVE FEATURES:
• Balanced Output Drivers: ±12mA
• Low switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
DESCRIPTION:
This 16-bit bus transceiver is built using advanced dual metal CMOS
technology. This high-speed, low power device is ideal for asynchronous
communication between two buses (A and B). The Direction and Output
Enable controls are designed to operate this device as either two indepen-
dent 8-bit transceivers or one 16-bit transceiver. The direction control pin
(DIR) controls the direction of data flow. The output enable pin (OE)
overrides the direction control and disables both ports. All inputs are
designed with hysteresis for improved noise margin.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVCHR162245A has series resistors in the device output structure
which will significantly reduce line noise when used with light loads. The
driver has been designed to drive ±12mA at the designated threshold
levels.
The LVCHR162245A has “bus-hold” which retains the inputs' last state
whenever the input goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
1DIR 1
1A1 47
46
1A2
1A3 44
1A4 43
41
1A5
40
1A6
1A7 38
1A8 37
48
1OE
2
1B1
3
1B2
5
1B3
6
1B4
8
1B5
9
1B6
11
1B7
12
1B8
24
2DIR
2A1 36
35
2A2
33
2A3
32
2A4
30
2A5
29
2A6
27
2A7
26
2A8
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 1999 Integrated Device Technology, Inc.
1
25
2OE
13 2B1
14
2B2
16
2B3
17
2B4
19 2B5
20
2B6
22
2B7
23
2B8
MARCH 1999
DSC-4598/2

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