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PDF S3F49DAX Data sheet ( Hoja de datos )
| Número de pieza | S3F49DAX | |
| Descripción | MultiMediaCard Controllers | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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S3F49DAX
MultiMediaCard Controllers
Datasheet
Revision 1.0
1 page  
MULTIMEDIACARD CONTROLLER
BLOCK DIAGRAM
S3C49DAX
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JTAG
Port
ARM7TDMI-S
TAP Controller
16K Byte SRAM
48K Byte
NOR Flash
XADDR
XDATA
External ROM
Interface
Power
Management
POR
D
M
NAND Flash
A Controller
NAND
Flash
D
M
A
MMC Host
Interface
A
H
B Interrupt
Controller
General IO
MMC
Host
GPIO
RNG
Bridge
RCOSC
UART & Timer
APB
DES
Figure 1. S3C49DAX Block Diagram
4
5 Page 
MULTIMEDIACARD CONTROLLER
S3C49DAX
Table 3. S3F49DAX Signal Description (Continuous)
Signal
I/O
Description
NOR Flash Interface
SCLK
I Serial CLOCK: This pin is used Tool program for internal Flash
(Write speed: Max 250 kHz, Read speed: Max 3 MHz)
SDAT
IO Serial DATA: This pin is used Tool program for internal Flash (Output when reading,
Input when writing.) Input & push-pull output port can be assigned.
VPP
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P Flash cell writing power supply pin for tool program mode. The function of entering flash
writing Mode.
Margin
I This pin can used the flash cell margin test
JTAG Interface
nTRST
I This pin (TAP Controller Reset) can reset the TAP controller at power-up. If the debugger
is not used, this pin should be "Low" level or low active pulse should be applied before
CPU running. For example, nRESET signal can be tied with this pin
TMS
I This pin (TAP Controller Mode Select) can control the sequence of the state diagram of
TAP controller
TCK I This pin (TAP Controller Clock) can provide the clock input for the JTAG logic
RTCK
O This pin is the returned TCK
TDI I This pin (TAP Controller Data Input) is the serial input for JTAG port.
TDO
O This Pin (TAP Controller Data Output) is the serial data output for JTAG port.
Power
IVCOUT
P IVC Out: This pin output the internal IVC Output voltage (1.8 V)
VDD
P Interface power supply
VSS
P Interface ground
10
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| PDF Descargar | [ Datasheet S3F49DAX.PDF ] | |
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