PDF LUPA-4000 Data sheet ( Hoja de datos )

Número de pieza	LUPA-4000
Descripción	4M Pixel CMOS Image Sensor
Fabricantes	Cypress Semiconductor
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No Preview Available ! LUPA-4000 Data Sheet www.DataSheet4U.com LUPA-4000 4M Pixel CMOS Image Sensor Datasheet Cypress Semiconductor Corporation 3901 North First Street San Jose, CA 95134 408-943-2600 Contact: [email protected] Document #: 38-05712 Rev.(Revision 1.2 ) Page 1 of 49 1 page LUPA-4000 Data Sheet www.DataSheet4U.com 1 Preamble 1.1 Overview This document describes the interfacing and the driving of the LUPA-4000 image sensor. This 4 mega-pixel CMOS active pixel sensor features synchronous shutter and a maximal frame-rate of 15fps in full resolution. The readout speed can be boosted by means of sub sampling and windowed Region Of Interest (ROI) readout. High dynamic range scenes can be captured using the double and multiple slope functionality. The sensor can be used with one or two outputs. Two on chip 10-bit ADC’s can be used to convert the analog data to a 10-bit digital word stream. The sensor uses a 3- wire Serial-Parallel (SPI) interface. It is housed in a 127-pin ceramic PGA package. This datasheet allows the user to develop a camera-system based on the described timing and interfacing. 1.2 Main features The main features of the image sensor are identified as: • 2048 x 2048 active pixels (4M pixel resolution). • 12 µm2 square pixels (based on the high-fill factor active pixel sensor technology of FillFactory (US patent No. 6,225,670 and others)). • Peak QE x FF of 37.50%. • Optical format: 24,6 mm x 24,6 mm • Pixel rate of 66 MHz using a 33 MHz system clock. • Optical dynamic range: 66 dB (2000:1) in single slope operation and up to 90 dB in multiple slope operation. • 2 On-chip 10 bit, 33 MSamples/s ADC. • Full snapshot shutter. • Random programmable windowing and sub-sampling modes. • 127-pin PGA package • Binning (Voltage averaging in X-direction) • Programmable read out direction (X and Y) 1.3 Part Number Name LUPA-4000-M CYIL1SM4000AA-GBC (preliminary) Package 127 pin ceramic PGA Monochrome / color Monochrome Cypress Semiconductor Corporation 3901 North First Street San Jose, CA 95134 408-943-2600 Contact: [email protected] Document #: 38-05712 Rev.(Revision 1.2 ) Page 5 of 49 5 Page LUPA-4000 Data Sheet www.DataSheet4U.com 3 Sensor architecture A schematic drawing of the architecture is given in the block diagram below. The image core consists of a pixel array, one X- and two Y-addressing registers (only one drawn), pixel array drivers and column amplifiers. The image sensor of 2048 * 2048 pixels is read out in progressive scan. One or two output amplifiers read out the image sensor. The output amplifiers are working at 66MHz pixel rate nominal speed or each at 33MHz pixel rate in case the 2 output amplifiers are used to read out the imager. The complete image sensor has been designed for operation up to 66MHz. The structure allows having a programmable addressing in the x-direction in steps of 2 and in the y-direction in steps of 2 (only even start addresses in X- and Y-direction are possible). The starting point of the address is uploadable by means of the Serial- Parallel Interface (SPI). eos_y On chip drivers Reset, mem_hl, precharge, samp pixel array 2048 * 2048 Clk_y sync_y Clk_x sync_x Column amplifiers X shift register Logic blocks SPI DAC Figure 3: Block diagram of the image sensor eos_x 2 differentia outputs Cypress Semiconductor Corporation 3901 North First Street San Jose, CA 95134 408-943-2600 Contact: [email protected] Document #: 38-05712 Rev.**(Revision 1.2 ) Page 11 of 49 11 Page

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