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PDF LM2720 Data sheet ( Hoja de datos )
| Número de pieza | LM2720 | |
| Descripción | 5-Bit Programmable/ High Frequency Multi-phase PWM Controller | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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February 2000
LM2720
5-Bit Programmable, High Frequency Multi-phase PWM
Controller
General Description
The LM2720 provides an attractive solution for power sup-
plies of high power microprocessors exhibiting ultra fast load
transients. Compared to a conventional single-phase supply,
an LM2720 based multi-phase supply distributes the thermal
and electrical loading among components in multiple phases
and greatly reduces the corresponding stress in each com-
ponent. The LM2720 can be programmed to control either a
3-phase converter or a 4-phase converter. Phase shift
among the phases is 120˚ in the case of three phase and 90˚
with four-phase. Because the power channels are out of
phase, there can be significant ripple cancellation for both
the input and output current, resulting in reduced input and
output capacitor size. Due to the nominal operating fre-
quency of 2 MHz per phase, the size of the output inductors
can be greatly reduced which results in a much faster load
transient response and a dramatically shrunk output capaci-
tor bank. Microprocessor power supplies with all surface
mount components can be easily built.
The internal high speed transconductance amplifier guaran-
tees good dynamic performance.
The internal master clock frequency of up to 8 MHz is set by
an external reference resistor. An external clock of 10 MHz
can also be used to drive the chip to achieve frequency con-
trol and multi-chip operation.
The LM2720 also provides input under-voltage lock-out with
hysteresis, input over-current protection and output voltage
power good detection.
Features
n Ultra fast load transient response
n Enables all surface-mount-design
n Selectable 2, 3, 4 phase operation
n Clock frequency from 40 kHz to 10 MHz
n Precision load current sharing
n 5-bit programmable from 3.5V to 1.3V
n VID code compatible to VRM 8.X specification
n Output voltage is 2.0V for VID code 11111
n Selectable internal or external clock
n Digital 16-step soft start
n Input under-voltage lock-out, over-current protection
n Open-drain power good signal output
Applications
n Servers and workstations
n High current, ultra-fast transient microprocessors
Pin Configuration
24-Pin Plastic SOIC
DS101322-1
Top View
See NS Package Number M24B
© 2000 National Semiconductor Corporation DS101322
www.national.com
1 page  
Pin Description
Pin Pin Name
1 Vcc5V
2 Divsel
3 Clksel
4 Extclk
5 Rref
6 Vid0
7 Vid1
8 Vid2
9 Vid3
10 Vid4
11 OC+
12 OC−
13 COMP
14 FB
15 Bgout
16 FBG
17 ENABLE
18 GND
19 DRV2
20 DRV0
21 Vcc12V
22 DRV1
23 DRV3
24 PWRGD
Pin Function
Supply Voltage Input (5V nominal)
Selects Phase Mode. Logic low selects 4 phase. Logic high selects 3 phase. 2 phase
operation is achieved by using 2 outputs in 4 phase mode.
Clock Select: Logic high selects internal clock. Logic low selects external clock.
External Clock Input. Output frequency = Clock Input / No. of Phases. Connect to Vcc5V to
select internal clock.
Connects to external reference resistor. Sets the operating frequency of the internal clock
and the ramp time for the PWM. Reference voltage at this pin is 1.26V.
5-Bit DAC Input (LSB).
5-Bit DAC Input.
5-Bit DAC Input.
5-Bit DAC Input.
5-Bit DAC Input (MSB)
Over-current Comparator. Non-inverting input.
Over-current Comparator. Inverting input.
Compensation Pin. This is the output of the internal transconductance amplifier.
Compensation network should be connected between this pin and feedback ground FBG.
Feedback Input. Normally Kelvin connected to supply output.
Current Limit Flag. Goes to logic low when current limit is activated. When over-current
condition is removed, this pin is weakly pulled up to Vcc5V.
Feedback Ground. This pin should be connected to the ground at the supply output.
Output Enable Pin. Tie to logic high to enable and logic low to disable.
Power Ground Pin.
Phase 2 Output.
Phase 0 Output.
Supply Voltage for FET Drivers DRV0:3.
Phase 1 Output.
Phase 3 Output.
Power Good. This is an open-drain output that goes low (low impedance to ground) when
the output voltage travels out of the threshold window, and resume to open-drain state when
VOUT recovers into the 50mV hysteresis window. The power good window threshold, i.e.
±100mV for 1.3V ≤ VOUT ≤ 1.9V or ±150mV for 2V ≤ VOUT ≤ 3.5V, is automatically set
according to VID code. Connect a 1nF capacitor to ground to filter out the switching noise
coupling from DRV3 to this pin.
5 www.national.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet LM2720.PDF ] | |
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