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PDF ACT9200 Data sheet ( Hoja de datos )

Número de pieza ACT9200
Descripción MINIATURE LOW PROFILE SURFACE MOUNT PACKAGE
Fabricantes Advanced Crystal Technology 
Logotipo Advanced Crystal Technology Logotipo



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No Preview Available ! ACT9200 Hoja de datos, Descripción, Manual

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ACT9200
The ACT9200 family is a miniature, low profile SMD package, with a ceramic base utilising a
seam welded metal lid for high reliability and better long-term stability. The metal lid is grounded
through the package to assist with EMI emission reductions. This 7x5mm device is available as
the ACT9200 in both 3V3 and 5V0. 1V8 and 2V5 versions are available as ACT9200L (See
ACT9200L data sheet). A 32.768kHz version is available as the 9200WC (See 9200WC data
sheet). Taped and reeled packaging (1k reels) and loose quantities are available for purchase, to
suit high and low volume production.
Specification
Parameter
www.DataSheet4U.cSoumpply Voltage
Frequency Range
Frequency Stability
Temp Operating Range
Temp Storage Range
Supply Current (max)
Duty Cycle
Output Level ‘0’
Output Level ‘1’
Rise & Fall Time (max)
Output Load
Start-up Time
Tri-state Input Voltage
Ageing
Period Jitter (Absolute)
Period Jitter (one sigma)
Symb.
Specification
Condition
Vdd
fo
Δf/fo
Topr
Tstg
Iop
Tw/t
VOL
VOH
TrTf
N/CL
Tosc
Fa
Tj
Tj
3.3VDC ± 10%
5.0VDC ±10%
Please specify
1.000 ~ 200.00 MHz
1.000 ~ 106.25 MHz
Please specify
±15ppm ~ ±100ppm
Please specify
0 ~ +70°Cstandard to -40 ~ +85°C
Please specify
-55 to +125°C
16mA (1.000 ~ 34.999 MHz)
25mA (1.0000 ~ 34.999 MHz)
25mA (35.000 ~ 60.00 MHz)
40mA (35.00 ~ 60.00 MHz)
40mA (60.001 ~ 99.999 MHz)
60mA (60.001 ~ 99.999 MHz)
50mA (100.00 ~ 155.00 MHz)
80mA (100.00 ~ 106.25 MHz)
60mA (155.01 ~ 200.00 MHz)
40/60% (Std) & 45/55% available
Please specify
0.4VDC max (TTL) 10% VDD max (HCMOS)
2.4VDC min (TTL) 90% VDD min (HCMOS)
10nS (1.000 ~ 34.999 MHz)
10nS (1.00 ~ 49.999 MHz)
5nS (35.00 ~ 99.999 MHz)
5nS (50.00MHz ~ 99.90 MHz)
2.5nS (100.00 ~200.00 MHz)
3nS (100.00 ~ 106.25 MHz)
10TTL / 15pF (30pF available)
10mS max
No Connection
Enable output
VIH : 90% of VDD
VIL : 10% of VDD
±5ppm
Enable output
Disable output : High Impedance
±3ppm option
first year max @25°C
100pS max @ 1.0MHz
Other frequencies - see Note 2 below
25pS max @ 1.0MHz
Other frequencies - see Note 2 below
Pad surface Material
Au
APPLICATIONS
- Microprocessor clock
- PDA / notebook
- Wireless applications
- Audio
- Gigabit ethernet
- Fibre channel
- Instrumentation
NOTE1: To reduce HF power supply noise, an external bypass
capacitor of 0.01µF close to ground and Vdd is recommended.
NOTE 2: Typical (max) Jitter values in pS:
RMS(1 sigma)
Absolute (Pk-Pk)
25MHz: 6.3 (10)
17.8 (28)
33MHZ: 5.2 (10)
14.7 (28)
60MHz: 3.7 (5.0)
10.5 (14.0)
100MHz 1.0 (3.0)
2.8 (8.4)
Please note that all parameters can not necessarily be specified in the same device
Customer to Specify : Frequency, Frequency Stability, Operating Temperature Range, Output Type, Output enable, Voltage, Duty Cycle
In line with our ongoing policy of product evolvement and improvement, the above specification is subject to change without notice
ISO9001: 2000 Registered
For quotations or further information please contact us at:
3 The Business Centre, Molly Millars Lane, Wokingham, Berks, RG41 2EY, UK
http://www.actcrystals.com
1 of 3
Issue: 8 SKr
Date: 2/11/05

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