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PDF IMP5219 Data sheet ( Hoja de datos )
| Número de pieza | IMP5219 | |
| Descripción | SCSII Termiinattor | |
| Fabricantes | IMP | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de IMP5219 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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I M P 51I M1 1P/5 121 29
DATA COMMUNICATIONS
9-Line SCSI Terminator
The 9-channel IMP5219 SCSI terminator is part of IMP's family of high-
performance SCSI terminators that deliver true UltraSCSI performance.
The BiCMOS design offers superior performance over first generation
linear regulator/resistor based terminators.
IMP's new architecture employs high-speed adaptive elements for each
channel, thereby providing the fastest response possible - typically
www.Data3S5hMeeHt4zU,.cwohmich is 100 times faster than the older linear regulator termi-
nator approach. The bandwidth of terminators based on the older
regulator/resistor terminator architecture is limited to 500kHz since a
large output stabilization capacitor is required. The IMP architecture
eliminates the external output compensation capacitor and the need
for transient output capacitors while maintaining pin compatibility
with first generation designs. Reduced component count is inherent
with the IMP5219.
The IMP5219 architecture tolerates marginal system designs. A key
improvement offered by the IMP5219 lies in its ability to insure reliable,
error-free communications even in systems which do not adhere to rec-
ommended SCSI hardware design guidelines, such as improper cable
lengths and impedance. Frequently, this situation is not controlled by the
peripheral or host designer.
For portable and configurable peripherals, the IMP5219 can be placed in
a sleep mode with an active LOW disable signal. Quiescent current is
typically 375µA and output are in a high impedance state when disabled.
Key Features
x Ultra-Fast response for Fast-20 SCSI applications
x Hot swap compatible
x 35MHz channel bandwidth
x 3.5V operation
x Less than 3pF output capacitance
x Sleep-mode current less than 375µA
x Thermally self limiting
x No external compensation capacitors
x Implements 8-bit or 16-bit (wide) applications
x Compatible with active negation drivers
(60ma/channel)
x Compatible with passive and active terminations
x Approved for use with SCSI 1, 2, 3 and UltraSCSI
Block Diagrams
Term Power
Thermal
Limiting
Circuit
Disable Pin
1.4V
–
+
Daily Silver IMP
Current
Biasing
Circuit
24mA Current
Limiting Circuit
2.85V
DATA OUTPUT
PIN DB (0)
1 of 9 Channels
5219_01.eps
Data Communications
1
1 page  
Figure 4. Receiving Waveform
3.5
Frequency = 1.03844MHz
3.0
2.5
2.0
www.DataSheet4U.com1.5
1.0
0.5
GND
–0.5
Time (250ns/Div.)
5219_04.eps
I M P 51I M1 1P/5 121 29
Typical Characteristics
Figure 5. Driving Waveform
3.5
Frequency = 1.00266MHz
3.0
2.5
2.0
1.5
1.0
0.5
GND
–0.5
Time (250ns/Div.)
5219_05.eps
Receiver
Figure 4
IMP5219
6 Meter, 92Ω
Driver
Figure 5
IMP5219
75C08
75C08
Figure 6. End-Driven Cable
5219_06.eps
Daily Silver IMP
Data Communications
5
5 Page | ||
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