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PDF ICS840004I Data sheet ( Hoja de datos )
| Número de pieza | ICS840004I | |
| Descripción | CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS840004I
FEMTOCLOCKS™CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS840004I is a 4 output LVCMOS/LVTTL
ICS Synthesizer optimized to generate Fibre Channel
HiPerClockS™ reference clock frequencies and is a member of
the HiPerClocksTM family of high performance
clock solutions from ICS. Using a 26.5625MHz,
18pF parallel resonant crystal, the following frequencies can be
generated based on the 2 frequency select pins (F_SEL1:0):
212.5MHz, 159.375MHz, 156.25MHz, 106.25MHz, and
www.DataShee5t43U.1.c2o5mMHz.The ICS840004I uses ICS’ 3rd generation low phase
noise VCO technology and can achieve 1ps or lower typical
random rms phase jitter, easily meeting Fibre Channel jitter
requirements. The ICS840004I is packaged in a small 20-pin
TSSOP package.
FEATURES
• Four LVCMOS/LVTTL outputs, 15Ω typical output impedance
• Selectable crystal oscillator interface
or LVCMOS single-ended input
• Supports the following input frequencies: 212.5MHz,
159.375MHz, 156.25MHz, 106.25MHz and 53.125MHz
• RMS phase jitter @ 212.5MHz(2.55MHz - 20MHz):
0.49ps (typical)
• Output supply modes:
Core/Output
3.3V/3.3V
3.3V/2.5V
2.5V/2.5V
• -40°C to 85°C ambient operating temperature
FREQUENCY SELECT FUNCTION TABLE
Input Frequency
(MHz)
26.5625
F_SEL1
0
Inputs
F_SEL0
M Divider
Value
0 24
26.5625
0 1 24
26.5625
26.5625
26.04166
10
11
01
24
24
24
N Divider
Value
3
4
6
12
4
M/N Ratio
Value
8
6
4
2
6
Output Frequency
Range (MHz)
212.5
159.375
106.25
53.125
156.25
BLOCK DIAGRAM
OE Pullup
F_SEL1:0 Pullup:Pullup
nPLL_SEL Pulldown
nXTAL_SEL Pulldown
XTAL_IN 26.5625MHz
OSC 0
XTAL_OUT
TEST_CLK Pulldown
1
2
Phase
Detector
VCO
F_SEL1:0
1N
0 0 ÷3
0 1 ÷4
0 1 0 ÷6
1 1 ÷12 (default)
M = ÷24 (fixed)
PIN ASSIGNMENT
F_SEL0 1 20 F_SEL1
nc 2 19 GND
nXTAL_SEL 3 18 Q0
TEST_CLK 4 17 Q1
OE 5
1 6 VDDO
MR 6 15 Q2
nPLL_SEL 7 14 Q3
VDDA 8
13 GND
nc 9 12 XTAL_IN
Q0 VDD 10 11 XTAL_OUT
ICS840004I
Q1
20-Lead TSSOP
6.5mm x 4.4mm x 0.92mm
Q2 package body
G Package
Q3 Top View
MR Pulldown
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
840004AGI
www.icst.com/products/hiperclocks.html
REV. A JUNE 28, 2005
1
1 page  
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS840004I
FEMTOCLOCKS™CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 5A. AC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
212.5
159.375
fOUT Output Frequency
156.25
106.25
53.125
www.DataSheett4sUk.(coo)m Output Skew; NOTE 1, 2
212.5MHz (2.55MHz - 20MHz)
TBD
0.49
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 3
159.375MHz (1.875MHz - 20MHz)
156.25MHz (1.875MHz - 20MHz)
106.25MHz (637kHz - 5MHz)
0.55
TBD
0.79
53.125MHz (637kHz - 5MHz)
TBD
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
400
50
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at VDDO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
Maximum
Units
MHz
MHz
MHz
MHz
MHz
ps
ps
ps
ps
ps
ps
ps
%
TABLE 5B. AC CHARACTERISTICS, VDD = VDDA = 3.3V±5%, VDDO = 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum Units
212.5
MHz
159.375
MHz
fOUT Output Frequency
156.25
106.25
MHz
MHz
53.125
MHz
tsk(o) Output Skew; NOTE 1, 2
TBD
ps
212.5MHz (2.55MHz - 20MHz)
0.46 ps
tjit(Ø)
RMS Phase Jitter (Random);
NOTE 3
159.375MHz (1.875MHz - 20MHz)
156.25MHz (1.875MHz - 20MHz)
106.25MHz (637kHz - 5MHz)
0.54
0.57
0.73
ps
ps
ps
53.125MHz (637kHz - 5MHz)
0.63 ps
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
450
50
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at VDDO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
ps
%
840004AGI
www.icst.com/products/hiperclocks.html
5
REV. A JUNE 28, 2005
5 Page 
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS840004I
FEMTOCLOCKS™CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 8. ORDERING INFORMATION
Part/Order Number
ICS840004AGI
ICS840004AGIT
Marking
ICS840004AGI
ICS840004AGI
Package
20 Lead TSSOP
20 Lead TSSOP
Shipping Packaging
tube
2500 tape & reel
Temperature
-40°C to 85°C
-40°C to 85°C
www.DataSheet4U.com
The aforementioned trademarks, HiPerClockS™ and FEMTOCLOCKS™ are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
840004AGI
www.icst.com/products/hiperclocks.html
REV. A JUNE 28, 2005
11
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