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ICS840001-34 fiches techniques PDF

Integrated Circuit Systems - CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER

Numéro de référence ICS840001-34
Description CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER
Fabricant Integrated Circuit Systems 
Logo Integrated Circuit Systems 





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ICS840001-34 fiche technique
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS840001-34
FEMTOCLOCKS™CRYSTAL-TO-
LVCMOS/LVTTL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
ICS
The ICS840001-34 is a two output LVCMOS/
LVTTL Synthesizer and a member of the
HiPerClockS™ HiPerClocksTM family of high performance
devices from ICS. One output is the LVCMOS/
LVTTL main synthesized clock output (Q) and
one output is a three-state LVCMOS/LVTTL reference
clock (REF_CLK) output at the frequency of the crystal
oscillator. The device can accept crystal from 15.3125MHz
www.DataSheetto4U4.c2o.m67MHz and can synthesize outputs from 81.67MHz
to 213.33MHz.The ICS840001-34 has excellent <1ps
phase jitter performance over the 637kHz – 10MHz
integration range. The ICS840001-34 is packaged in a
3mm x 3mm 16-pin VFQFN, making it ideal for use on
space constrained boards.
FEATURES
(2) LVCMOS/LVTTL outputs, 20Ω typical output impedence
(1) Main clock output (Q)
(1) Three-state reference clock output (REF_CLK)
Crystal oscillator interface can accept crystals from
15.3125MHz to 42.67MHz, 18pF parallel resonant crystal
Output frequency range: 81.67MHz to 213.33MHz
VCO range: 490MHz to 640MHz
RMS phase jitter @ 106.25MHz, using a 26.5625MHz crystal
(637kHz - 10MHz): 0.38ps (typical)
3.3V operating supply
0°C to 70°C ambient operating temperature
COMMON APPLICATION CONFIGURATION TABLE
Inputs
Crystal M Divider VCO (MHz) N Divider
40 15
600
6
26.5625
40
26.5625
25
25
22.5
19.44
24
15
24
25
25
25
32
637.5
600
637.5
625
625
562.5
622.08
6
4
3
5
4
3
4
Output Frequency
(MHz)
100
106.25
150
212.5
125
156.25
187.5
155.52
Application
Serial Attached (SCSI),
PCI Express™, Processor Clock
Fibre Channel
Serial ATA (SATA), Processor Clock
Fibre Channel 2
Ethernet
10 Gigabit Ethernet
12 Gigabit Ethernet
SONET
BLOCK DIAGRAM
OE (Pullup)
PIN ASSIGNMENT
XTAL_IN
XTAL_OUT
OSC
Phase
Detector
VCO
490MHz - 640MHz
00 = ÷3
01 = ÷4
10 = ÷5
11 = ÷6 (default)
REF_CLK
16 15 14 13
OE 1
12 Q
XTAL_IN 2
11 VDDO
Q XTAL_OUT 3
10 GND
M0 4
9 VDD
5678
M1 (Pullup)
M0 (Pullup)
N1 (Pullup)
(Pullup)
N0
11 = ÷15 (default)
10 = ÷24
01 = ÷25
00 = ÷32
ICS840001-34
16-Lead VFQFN
3mm x 3mm x 0.95 package body
K Package
Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
840001AK-34
www.icst.com/products/hiperclocks.html
REV. A MAY 6, 2005
1

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