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PDF K6T8016C3M Data sheet ( Hoja de datos )

Número de pieza K6T8016C3M
Descripción 512Kx16 bit Low Power CMOS Static RAM
Fabricantes Samsung semiconductor 
Logotipo Samsung semiconductor Logotipo



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No Preview Available ! K6T8016C3M Hoja de datos, Descripción, Manual

K6T8016C3M Family
Document Title
512Kx16 bit Low Power CMOS Static RAM
CMOS SRAM
Revision History
Revision No. History
0.0 Initial draft
Draft Date
June 18, 1999
Remark
Advance
1.0
www.DataSheet4U.com
1.01
Finalize
- Adopt New Code system.
- Improve VIN, VOUT max. on A’ BSOLUTE MAXIMUM RATINGS’from
7.0V to VCC+0.5V.
Errata correction
February 29, 2000
April 17, 2000
Final
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to yourquestions about device. If you have any questions, please contact the SAMSUNG branch offices.
1 Revision 1.01
April 2000

1 page




K6T8016C3M pdf
K6T8016C3M Family
CMOS SRAM
AC OPERATING CONDITIONS
TEST CONDITIONS(Test Load and Input/Output Reference)
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage:1.5V
Output load(see right): CL=100pF+1TTL
CL=50pF+1TTL
CL1)
1.Including scope and jig capacitance
AC CHARACTERISTICS (VCC=4.5~5.5V, Commercial product:TA=0 to 70°C, Industrial product:TA=-40 to 85°C)
Parameter List
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Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
LB, UB enable to low-Z output
Chip disable to high-Z output
Output Disable to High-Z Output
Output hold from address change
LB, UB valid to data output
UB, LB disable to high-Z output
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
LB, UB valid to end of write
Symbol
tRC
tAA
tCO
tOE
tLZ
tOLZ
tBLZ
tHZ
tOHZ
tOH
tBA
tBHZ
tWC
tCW
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
tBW
Speed Bins
55ns
70ns
Min Max Min Max
55 - 70 -
- 55 - 70
- 55 - 70
- 25 - 35
10 - 10 -
5- 5 -
5- 5 -
0 20 0 25
0 20 0 25
10 - 10 -
- 25 - 35
0 20 0 25
55 - 70 -
45 - 60 -
0- 0 -
45 - 60 -
40 - 55 -
0- 0 -
0 20 0 25
20 - 30 -
0- 0 -
5- 5 -
45 - 60 -
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Symbol
Test Condition
Vcc for data retention
VDR CSVcc-0.2V
Data retention current
IDR
Vcc=3.0V, CSVcc-0.2V
CSVcc-0.2V
K6T8016C3M-B
K6T8016C3M-F
Data retention set-up time
Recovery time
tSDR
tRDR
See data retention waveform
Min Typ Max Unit
2.0 - 5.5 V
- - 20
µA
- - 30
0- -
ms
5- -
5 Revision 1.01
April 2000

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