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PDF IDT49FCT3805B Data sheet ( Hoja de datos )
| Número de pieza | IDT49FCT3805B | |
| Descripción | 3.3V CMOS BUFFER/CLOCK DRIVER | |
| Fabricantes | IDT | |
| Logotipo |  |
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IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
BUFFER/CLOCK DRIVER
IDT49FCT3805B
FEATURES:
• 0.5 MICRON CMOS Technology
• Guaranteed low skew < 500ps (max.)
• Very low duty cycle distortion < 1.0ns (max.)
• Very low CMOS power levels
• TTL compatible inputs and outputs
• Inputs can be driven from 3.3V or 5V components
www.Data•ShTeweto4Uin.cdoempendent output banks with 3-state control
• 1:5 fanout per bank
• "Heartbeat" monitor output
• VCC = 3.3V ± 0.3V
• Available in SSOP, SOIC, and QSOP packages
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The FCT3805B is a 3.3 volt, non-inverting clock driver built using
advanced dual metal CMOS technology. The device consists of two banks
of drivers, each with a 1:5 fanout and its own output enable control. The
device has a "heartbeat" monitor for diagnostics and PLL driving. The
MON output is identical to all other outputs and complies with the output
specifications in this document. The FCT3805B offers low capacitance
inputs with hysteresis.
The FCT3805B is designed for high speed clock distribution where
signal quality and skew are critical. The FCT3805B also allows single
point-to-point transmission line driving in applications such as address
distribution, where one signal must be distributed to multiple recievers with
low skew and high signal quality.
For more information on using the FCT3805B with two different input
frequencies on bank A and B, please see AN-236.
PIN CONFIGURATION
OEA
INA
INB
OEB
5
OA1 - OA5
5
OB1 - OB5
MON
VCCA
OA1
OA2
OA3
GNDA
OA4
OA5
GNDQ
OEA
INA
1
2
3
4
5
6
7
8
9
10
20 VCCB
19 OB1
18 OB2
17 OB3
16 GNDB
15 OB4
14 OB5
13 MON
12 OEB
11 INB
SOIC/ SSOP/ QSOP
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL
c 2005 Integrated Device Technology, Inc.
TEMPERATURE
1
RANGE
JUNE 2005
DSC 6879/-
1 page  
IDT49FCT3805B
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE (3,4)
Commercial
Industrial
Symbol Parameter
Conditions(1)
Min.(2)
Max.
tPLH PropagationDelay
CL = 50pF
1.5
5
1.5 5.2
tPHL INA to OAn, INB to OBn
RL = 500Ω
tR OutputRiseTime
—2 —2
tF OutputFallTime
—2 —2
tSK(O) Output skew: skew between outputs of all banks of
— 0.5
— 0.6
same package (inputs tied together)
tSK(P) Pulse skew: skew between opposite transitions
—1 —1
of same output (|tPHL-–tPLH|)
www.DataSheet4U.com
tSK(T) Package skew: skew between outputs of different
— 1.2
— 1.2
packages at same power supply voltage,
temperature, package type and speed grade
tPZL OutputEnableTime
1.5 6
1.5 6
tPZH OEA to OAn, OEB to OBn
tPLZ OutputDisableTime
1.5 5
1.5 5
tPHZ OEA to OAn, OEB to OBn
Unit
ns
ns
ns
ns
ns
ns
ns
ns
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet IDT49FCT3805B.PDF ] | |
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