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IDT - IDT49FCT3805

Numéro de référence 49FCT3805
Description IDT49FCT3805
Fabricant IDT 
Logo IDT 





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49FCT3805 fiche technique
IDT49FCT3805/A
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
BUFFER/CLOCK DRIVER
IDT49FCT3805/A
FEATURES:
• 0.5 MICRON CMOS Technology
• Guaranteed low skew < 500ps (max.)
• Very low duty cycle distortion < 1.0ns (max.)
• Very low CMOS power levels
• TTL compatible inputs and outputs
• Inputs can be driven from 3.3V or 5V components
www.DataShTeweto4Uin.cdoempendent output banks with 3-state control
• 1:5 fanout per bank
• "Heartbeat" monitor output
• VCC = 3.3V ± 0.3V
• Available in SSOP, SOIC, and QSOP packages
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
The FCT3805 is a 3.3 volt, non-inverting clock driver built using
advanced dual metal CMOS technology. The device consists of two banks
of drivers, each with a 1:5 fanout and its own output enable control. The
device has a "heartbeat" monitor for diagnostics and PLL driving. The
MON output is identical to all other outputs and complies with the output
specifications in this document. The FCT3805 offers low capacitance inputs
with hysteresis.
The FCT3805 is designed for high speed clock distribution where signal
quality and skew are critical. The FCT3805 also allows single point-to-
point transmission line driving in applications such as address distribution,
where one signal must be distributed to multiple recievers with low skew
and high signal quality.
For more information on using the FCT3805 with two different input
frequencies on bank A and B, please see AN-236.
PIN CONFIGURATION
OEA
INA
INB
OEB
5
OA1 - OA5
5
OB1 - OB5
MON
VCCA
OA1
OA2
OA3
GNDA
OA4
OA5
GNDQ
OEA
INA
1
2
3
4
5
6
7
8
9
10
20 VCCB
19 OB1
18 OB2
17 OB3
16 GNDB
15 OB4
14 OB5
13 MON
12 OEB
11 INB
SOIC/ SSOP/ QSOP
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL
c 2004 Integrated Device Technology, Inc.
TEMPERATURE
1
RANGE
SEPTEMBER 2004
DSC-3102/5

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