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PDF VCT3831B Data sheet ( Hoja de datos )

Número de pieza VCT3831B
Descripción (VCT38xxB) Video/Controller/Teletext IC Family
Fabricantes Micronas Semiconductor 
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MICRONAS
PRELIMINARY DATA SHEET
VCT 38xxA/B
Video/Controller/Teletext
IC Family
Edition Jan. 8, 2002
6251-518-1PD
MICRONAS

1 page




VCT3831B pdf
PRELIMINARY DATA SHEET
Contents, continued
Page
Section Title
122
5.14.
Capture Compare Module (CAPCOM)
122
5.14.1.
Features
123
5.14.2.
Initialization
123
5.14.3.
Operation of CCC
123
5.14.3.1.
Operation of Subunit
123
5.14.3.2.
Compare and Output Action
124
5.14.3.3.
Capture and Input Action
124
5.14.3.4.
Interrupts
124
5.14.4.
Inactivation
125
5.14.5.
CAPCOM Registers
127
5.15.
Pulse Width Modulator
127
5.15.1.
Features
127
5.15.2.
General
127
5.15.3.
Initialization
127
5.15.4.
Operation
127
5.15.5.
PWM Registers
128
5.16.
Tuning Voltage Pulse Width Modulator
128
5.16.1.
Features
128
5.16.2.
General
129
5.16.3.
Initialization
129
5.16.4.
Operation
129
5.16.5.
TVPWM Registers
130
5.17.
A/D Converter (ADC)
130
5.17.1.
Features
131
5.17.2.
Operation
131
5.17.3.
Measurement Errors
131
5.17.4.
Comparator
132
5.17.5.
ADC Registers
133
5.18.
Closed Caption Module (CC)
133
5.18.1.
Features
134
5.18.2.
Operation
134
5.18.2.1.
Lowpass filter
134
5.18.2.2.
Input timing
134
5.18.2.3.
Threshold adaption
134
5.18.2.4.
Bitslicing
134
5.18.2.5.
Timing recovery
134
5.18.2.6.
Shift register
134
5.18.2.7.
Controlling
134
5.18.2.8.
Formatter
135
5.18.3.
CCM Registers
137
5.19.
Ports
137
5.19.1.
Port Assignment
138
5.19.2.
Universal Ports P1 to P3
138
5.19.2.1.
Features
139
5.19.2.2.
Universal Port Mode
139
5.19.3.
Universal Port Registers
140
5.19.4.
I2C Ports P40 and P41
140
5.19.4.1.
Features
141
5.19.5.
Audio Ports P42 to P46
141
5.19.5.1.
Features
142
5.19.6.
CLK20 Output Port
142
5.19.6.1.
Features
143
5.20.
I/O Register Cross Reference
Micronas
VCT 38xxA/B
5

5 Page





VCT3831B arduino
PRELIMINARY DATA SHEET
VCT 38xxA/B
2. Video Processing
2.1. Introduction
The VCT 38xxA/B includes complete video, display,
and deflection processing. In the following sections the
video processing part of the VCT 38xxA/B will be
named VDP for short.
All processing is done digitally, the video front-end and
video back-end are interfacing to the analog world.
Most functions of the VDP can be controlled by soft-
ware via I2C bus slave interface (see Section 2.14. on
page 31).
2.2.2. Clamping
The composite video input signals are AC-coupled to
the IC. The clamping voltage is stored on the coupling
capacitors and is generated by digitally controlled cur-
rent sources. The clamping level is the back porch of
the video signal. S-VHS chrominance is also AC-cou-
pled. The input pin is internally biased to the center of
the ADC input range. The chrominance inputs for
YCrCb need to be AC-coupled by 220 nF clamping
capacitors. It is strongly recommended to use 5-MHz
anti-alias low-pass filters on each input. Each channel
is sampled at 10.125 MHz with a resolution of 8 bit and
a clamping level of 128.
2.2. Video Front-end
This block provides the analog interfaces to all video
inputs and mainly carries out analog-to-digital conver-
sion for the following digital video processing. A block
diagram is given in Fig. 21.
Most of the functional blocks in the front-end are digi-
tally controlled (clamping, AGC, and clock-DCO). The
control loops are closed by the Fast Processor (FP)
embedded in the video decoder.
2.2.3. Automatic Gain Control
A digitally working automatic gain control adjusts the
magnitude of the selected baseband by +6/4.5 dB in
64 logarithmic steps to the optimal range of the ADC.
The gain of the video input stage including the ADC is
213 steps/V with the AGC set to 0 dB. The gain of the
chrominance path in the YCrCb mode is fix and
adapted to a nominal amplitude of 0.7 Vpp. However, if
an overflow of the ADC occurs an extended signal
range from 1 Vpp can be selected.
2.2.1. Input Selector
Up to eight analog inputs can be connected. Four
inputs (five in case of VCT 38xxB) are for input of com-
posite video or S-VHS luma signal. These inputs are
clamped to the sync back porch and are amplified by a
variable gain amplifier. Two chroma inputs can be
used for connection of S-VHS carrier-chrominance sig-
nal. These inputs are internally biased and have a
fixed gain amplifier. For analog YCrCb signals (e.g.
from DVD players) one of the selected luminance
inputs is used together with CBIN and CRIN inputs.
2.2.4. Analog-to-Digital Converters
Two ADCs are provided to digitize the input signals.
Each converter runs with 20.25 MHz and has 8 bit res-
olution. An integrated bandgap circuit generates the
required reference voltages for the converters.
VOUT
CVBS/Y
CVBS/Y VIN1
CVBS/Y VIN2
CVBS/Y VIN3
CVBS/Y VIN4
CVBS/Y VIN5
Chroma CIN1
Chroma
CIN2
CRIN
Chroma CBIN
Fig. 21: Video front-end
Clamp
Bias
Clamp
+ AGC
+6/4.5 dB
3
ADC
digital CVBS or Luma
Gain
ADC
digital Chroma
Reference
Generation
DVCO
±150
ppm
System Clocks
Frequency
20.25 MHz
Micronas
11

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