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PDF ICS22002I-01 Data sheet ( Hoja de datos )
| Número de pieza | ICS22002I-01 | |
| Descripción | CRYSTAL-TOLVHSTL FREQUENCY SYNTHESIZER | |
| Fabricantes | IDT | |
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PRELIMINARY
FEMTOCLOCKS™ CRYSTAL-TO-
LVHSTL FREQUENCY SYNTHESIZER
General Description
The ICS8422002I-01 is a 2 output LVHSTL
ICS Synthesizer optimized to generate Ethernet
HiPerClockS™ reference clock frequencies and is a member of the
HiPerClocksTM family of high performance clock
solutions from IDT. Using a 25MHz 18pF parallel
resonant crystal, the following frequencies can be generated
based on the 2 frequency select pins (F_SEL[1:0]): 156.25MHz,
125MHz and 62.5MHz. The ICS8422002I-01 uses IDT’s 3rd
generation low phase noise VCO technology and can achieve 1ps
or lower typical rms phase jitter, easily meeting Ethernet jitter
requirements. The ICS8422002I-01 is packaged in a small 20-pin
TSSOP package.
Block Diagram
F_SEL[1:0] Pulldown
nPLL_SEL Pulldown
2
REF_CLK Pulldown
25MHz
XTAL_IN
OSC
XTAL_OUT
nXTAL_SEL Pulldown
1
0
Phase
Detector
VCO
1
0
ICS8422002I-01
Features
• Two LVHSTL outputs (VOHmax = 1.2V)
• Selectable crystal oscillator interface or
LVCMOS/LVTTL single-ended input
• Supports the following output frequencies: 156.25MHz,
125MHz, 62.5MHz
• VCO range: 560MHz - 680MHz
• RMS phase jitter @ 156.25MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.44ps (typical)
• Power supply modes:
Core/Output
3.3V/1.8V
2.5V/1.8V
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
Pin Assignment
nc
VDDO
Q0
nQ0
MR
nPLL_SEL
nc
VDDA
F_SEL0
VDD
1
2
3
4
5
6
7
8
9
10
20 VDDO
19 Q1
18 nQ1
17 GND
16 VDD
15 nXTAL_SEL
14 REF_CLK
13 XTAL_IN
12 XTAL_OUT
11 F_SEL1
ICS422002I-01
20-Lead TSSOP
6.5mm x 4.4mm x 0.925mm package body
G Package
Top View
F_SEL[1:0]
0 0 ÷4
0 1 ÷5
1 0 ÷10
1 1 Not Used
Q0
nQ0
Q1
nQ1
M = 25 (fixed)
MR Pulldown
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization and/or qualification.
Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT™ / ICS™ LVHSTL FREQUENCY SYNTHESIZER
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ICS8422002AGI-01 REV. C NOVEMBER 1, 2007
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FEMTOCLOCKS™ CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER
PRELIMINARY
AC Electrical Characteristics
Table 5A. AC Characteristics, VDD = VDDA = 3.3V ± 5%, VDDO = 1.8V ±0.2V, TA = -40°C to 85°C
Parameter Symbol
Test Conditions
Minimum Typical
F_SEL[1:0] = 00
140
fOUT
Output Frequency
F_SEL[1:0] = 01
F_SEL[1:0] = 10
112
56
tsk(o)
Output Skew; NOTE 1, 2
TBD
156.25MHz, (1.875MHz – 20MHz)
tjit()
RMS Phase Jitter (Random);
NOTE 3
125MHz, (1.875MHz – 20MHz)
62.5MHz, (1.875MHz – 20MHz)
0.44
0.48
0.49
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
410
50
Maximum
170
136
68
Units
MHz
MHz
MHz
ps
ps
ps
ps
ps
%
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions. Measured at VDDO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
Table 5B. AC Characteristics, VDD = VDDA = 2.5V ± 5%, VDDO = 1.8V ±0.2V, TA = -40°C to 85°C
Parameter Symbol
Test Conditions
Minimum Typical
F_SEL[1:0] = 00
140
fOUT
Output Frequency
F_SEL[1:0] = 01
F_SEL[1:0] = 10
112
56
tsk(o)
Output Skew; NOTE 1, 2
TBD
156.25MHz, (1.875MHz – 20MHz)
tjit()
RMS Phase Jitter (Random);
NOTE 3
125MHz, (1.875MHz – 20MHz)
62.5MHz, (1.875MHz – 20MHz)
0.41
0.49
0.50
tR / tF
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
380
50
Maximum
170
136
68
Units
MHz
MHz
MHz
ps
ps
ps
ps
ps
%
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions. Measured at VDDO/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Please refer to the Phase Noise Plot.
IDT™ / ICS™ LVHSTL FREQUENCY SYNTHESIZER
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ICS8422002AGI-01 REV. C NOVEMBER 1, 2007
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FEMTOCLOCKS™ CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER
PRELIMINARY
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8422002I-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS8422002I-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core)MAX = VDD_MAX * IDD_MAX = 3.465V * 100mA = 346.5mW
• Power (outputs)MAX = 32.8mW/Loaded Output pair
If all outputs are loaded, the total power is 2 x 32.8mW = 65.6mW
Total Power_MAX (3.465V, with all outputs switching) = 346.5mW + 65.6mW = 412.1mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device.
The maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θJA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a moderate
air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.412W * 66.6°C/W = 112.4°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type
of board (single layer or multi-layer).
Table 6. Thermal Resistance θJA for 20 Lead TSSOP, Forced Convection
θJA by Velocity
Linear Feet per Minute
0
Single-Layer PCB, JEDEC Standard Test Boards
114.5°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
73.2°C/W
200
98.0°C/W
66.6°C/W
500
88.0°C/W
63.5°C/W
IDT™ / ICS™ LVHSTL FREQUENCY SYNTHESIZER
11
ICS8422002AGI-01 REV. C NOVEMBER 1, 2007
11 Page | ||
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| PDF Descargar | [ Datasheet ICS22002I-01.PDF ] | |
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