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PDF SCC2681 Data sheet ( Hoja de datos )

Número de pieza SCC2681
Descripción Dual asynchronous receiver/transmitter
Fabricantes NXP Semiconductors 
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No Preview Available ! SCC2681 Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
SCC2681
Dual asynchronous receiver/transmitter
(DUART)
Product data
2004 Apr 06
Philips
Semiconductors

1 page




SCC2681 pdf
Philips Semiconductors
Dual asynchronous receiver/transmitter (DUART)
Product data
SCC2681
ABSOLUTE MAXIMUM RATINGS1
SYMBOL
Tamb
Tstg
PARAMETER
Operating ambient temperature range2
Storage temperature range
All voltages with respect to ground3
RATING
See Note 4
–65 to +150
–0.5 to +6.0
UNIT
°C
°C
V
Pin voltage range
VSS – 0.5 V to VCC + 0.5 V
V
NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other condition above those indicated in the operation section of this specification is not
implied.
2. For operating at elevated temperatures, the device must be derated based on +150 °C maximum junction temperature.
3. This product includes circuitry specifically designed for the protection of its internal devices from damaging effects of excessive static
charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying any voltages larger than the rated maxima.
4. Parameters are valid over specified temperature range. See Ordering information table for applicable operating temperature range and VCC
supply range.
DC ELECTRICAL CHARACTERISTICS1, 2, 3
Tamb = –40 °C to +85 °C; VCC = +5.0 V ± 10%
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
Min Typ
UNIT
Max
VIL LOW-level input voltage
VIH HIGH-level input voltage (except X1/CLK)
VIH HIGH-level input voltage (except X1/CLK)
VIH HIGH-level input voltage (X1/CLK)
Tamb 0 °C
Tamb < 0 °C
– – 0.8 V
2.0 – – V
2.5 – – V
0.8 VCC
V
VOL LOW-level output voltage
VOH HIGH-level output voltage (except open-drain outputs)4
IOL = 2.4 mA
IOH = –400 µA
– – 0.4 V
VCC – 0.5 – – V
IIX1
IILX1
IIHX1
X1/CLK input current
X1/CLK input LOW current – operating
X1/CLK input HIGH current – operating
VIN = 0 V to VCC
VIN = 0 V
VIN = VCC
–10 – +10 µA
–75 – 0 µA
0 – 75 µA
IOHX2
IOHX2S
IOLX2
IOLX2S
II
IOZH
IOZL
IODL
IODH
ICC
X2 output HIGH current – operating
X2 output HIGH short circuit current – operating
X2 output LOW current – operating
X2 output LOW short circuit current – operating
Input leakage current:
All except input port pins
Input port pins
Output off current HIGH, 3-state data bus
Output off current LOW, 3-state data bus
Open-drain output LOW current in off-state
Open-drain output HIGH current in off-state
Power supply current5
Operating mode
VOUT = VCC; X1 = 0
VOUT = 0 V; X1 = 0
VOUT = 0 V; X1 = VCC
VOUT = VCC; X1 = VCC
VIN = 0 V to VCC
VIN = 0 V to VCC
VIN = VCC
VIN = 0 V
VIN = 0 V
VIN = VCC
CMOS input levels
0
–10
–75
1
–10
–20
–10
–10
– +75 µA
– –1 mA
– 0 µA
– 10 mA
– +10 µA
– +10 µA
– 10 µA
– – µA
– – µA
– 10 µA
– 10 mA
NOTES:
1. Parameters are valid over specified temperature range.
2. All voltage measurements are referenced to ground (GND). For testing, all inputs swing between 0.4 V and 2.4 V with a transition time of
5 ns maximum. For X1/CLK this swing is between 0.4 V and 4.4 V. All time measurements are referenced at input voltages of 0.8 V and
2.0 V and output voltages of 0.8 V and 2.0 V, as appropriate.
3. Typical values are at +25 °C, typical supply voltages, and typical processing parameters.
4. Test conditions for outputs: CL = 150 pF, except interrupt outputs. Test conditions for interrupt outputs: CL = 50 pF, RL = 2.7 kto VCC.
5. All outputs are disconnected. Inputs are switching between CMOS levels of VCC – 0.2 V and VSS + 0.2 V.
2004 Apr 06
5

5 Page





SCC2681 arduino
Philips Semiconductors
Dual asynchronous receiver/transmitter (DUART)
Product data
SCC2681
PROGRAMMING
The operation of the DUART is programmed by writing control words
into the appropriate registers. Operational feedback is provided via
status registers which can be read by the CPU. The addressing of
the registers is described in Table 1.
The contents of certain control registers are initialized to zero on
RESET. Care should be exercised if the contents of a register are
changed during operation, since certain changes may cause
operational problems.
For example, changing the number of bits per character while the
transmitter is active may cause the transmission of an incorrect
character. In general, the contents of the MR, the CSR, and the
OPCR should only be changed while the receiver(s) and
transmitter(s) are not enabled, and certain changes to the ACR
should only be made while the C/T is stopped.
Mode registers 1 and 2 of each channel are accessed via
independent auxiliary pointers. The pointer is set to MR1x by
RESET or by issuing a ‘reset pointer’ command via the
corresponding command register. Any read or write of the mode
register while the pointer is at MR1x, switches the pointer to MR2x.
The pointer then remains at MR2x, so that subsequent accesses are
always to MR2x unless the pointer is reset to MR1x as described
above.
Mode, command, clock select, and status registers are duplicated
for each channel to provide total independent operation and control.
Refer to Table 2 for register bit descriptions.
Table 1. SCC2681 Register Addressing
A3 A2 A1 A0
READ (RDN = 0)
WRITE (WRN = 0)
00 0 0
00 0 1
00 1 0
00 1 1
01 0 0
01 0 1
01 1 0
01 1 1
10 0 0
10 0 1
10 1 0
10 1 1
11 0 0
11 0 1
11 1 0
11 1 1
Mode Register A (MR1A, MR2A)
Status Register A (SRA)
BRG Extend *
Rx Holding Register A (RHRA)
Input Port Change Register (IPCR)
Interrupt Status Register (ISR)
Counter/Timer Upper Value (CTU)
Counter/Timer Lower Value (CTL)
Mode Register B (MR1B, MR2B)
Status Register B (SRB)
1×/16× Test
Rx Holding Register B (RHRB)
Use for scratch pad
Input Ports IP0 to IP6
Start Counter Command
Stop Counter Command
Mode Register A (MR1A, MR2A)
Clock Select Register A (CSRA)
Command Register A (CRA)
Tx Holding Register A (THRA)
Aux. Control Register (ACR)
Interrupt Mask Register (IMR)
C/T Upper Preset Value (CRUR)
C/T Lower Preset Value (CTLR)
Mode Register B (MR1B, MR2B)
Clock Select Register B (CSRB)
Command Register B (CRB)
Tx Holding Register B (THRB)
Use for scratch pad
Output Port Conf. Register (OPCR)
Set Output Port Bits Command
Reset Output Port Bits Command
* See Table 5 for BRG Extended frequencies in this data sheet, and “Extended baud rates for SCN2681, SCN68681, SCC2691, SCC2692,
SCC68692 and SCC2698B” in application notes elsewhere in this publication.
2004 Apr 06
11

11 Page







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