PC28F128J3D Datasheet PDF - Intel
| Part Number | PC28F128J3D | |
| Description | Embedded Flash Memory | |
| Manufacturers | Intel | |
| Logo |  |
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Intel® Embedded Flash Memory (J3 v. D)
32, 64, 128, and 256 Mbit
Datasheet
Product Features
Architecture
— High-density symmetrical 128-Kbyte blocks
— 256 Mbit (256 blocks)
— 128 Mbit (128 blocks)
— 64 Mbit (64 blocks)
— 32 Mbit (32 blocks)
Performance
— 75 ns Initial Access Speed (128/64/32
-Mbit densities)
— 95 ns Initial Access Speed (256 Mbit only)
— 25 ns 8-word and 4-word Asynchronous
page-mode reads
— 32-Byte Write buffer
— 4 µs per Byte Effective programming time
Security
— Enhanced security options for code
protection
— 128-bit Protection Register
— 64-bit Unique device identifier
— 64-bit User-programmable OTP cells
— Absolute protection with VPEN = GND
— Individual block locking
— Block erase/program lockout during power
transitions
Software
— Program and erase suspend support
— Flash Data Integrator (FDI), Common Flash
Interface (CFI) Compatible
System Voltage and Power
— VCC = 2.7 V to 3.6 V
— VCCQ = 2.7 V to 3.6 V
Packaging
— 56-Lead TSOP package (32, 64, 128 Mbit
only)
— 64-Ball Intel® Easy BGA package (32, 42,
128 and 256 Mbit)
Quality and Reliability
— Operating temperature:
-40 °C to +85 °C
— 100K Minimum erase cycles per block
— 0.13 µm ETOX™ VIII Process
Document Number: 308551-004US
February 2007
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Intel® Embedded Flash Memory (J3 v. D)
Revision History
Date
July 2005
September 2005
February 2006
February 2007
Revision Description
001 Initial release
Changed Marketing name from 28FxxxJ3 to J3 v. D.
Updated the following:
• Table 18, “Command Bus Operations” on page 36
002 • Section 9.2.2, “Read Status Register” on page 39
• Section 9.3.2, “Buffered Programming” on page 41
• Table 26, “Valid Commands During Suspend” on page 43
Added Table 27, “STS Configuration Register” on page 44.
Section 5.3.1, “Power-Up/Down Characteristics” on page 20 was modified.
Notes on Table 8, “DC Voltage Characteristics” on page 22 were updated
003 Table 10, “Read Operations” on page 25 was updated with R16 value
Table 12, “Configuration Performance” on page 30 was updated
Note 1 of Table 28, “STS Configuration Coding Definitions” on page 45 was updated.
Added 256-Mbit
004
Updated format.
February 2007
Document Number: 308551-004US
Intel® Embedded Flash Memory (J3 v. D)
DS
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for PC28F128J3D electronic component. |
| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ PC28F128J3D.PDF Datasheet ] | |
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