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PDF FSCM0565RG Data sheet ( Hoja de datos )
| Número de pieza | FSCM0565RG | |
| Descripción | Green Mode Fairchild Power Switch | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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www.fairchildsemi.com
FSCM0765R
Green Mode Fairchild Power Switch (FPSTM)
Features
• Internal Avalanche Rugged SenseFET
• Low Start-up Current (max 40uA)
• Low Power Consumption under 1 W at 240VAC and
0.4W Load
• Precise Fixed Operating Frequency (66kHz)
• Frequency Modulation for low EMI
• Pulse by Pulse Current Limiting (Adjustable)
• Over Voltage Protection (OVP)
• Over Load Protection (OLP)
• Thermal Shutdown Function (TSD)
• Auto-Restart Mode
• Under Voltage Lock Out (UVLO) with Hysteresis
• Built-in Soft Start (15ms)
Application
• SMPS for VCR, SVR, STB, DVD and DVCD
• Adaptor
• SMPS for LCD Monitor
OUTPUT POWER TABLE
230VAC ±15%(3)
85-265VAC
PRODUCT
Adapt- Open Adapt- Open
er(1) Frame(2) er(1) Frame(2)
FSCM0565RJ 50W
65W
40W
50W
FSCM0765RJ 65W
70W
50W
60W
FSCM0565RI 50W
65W
40W
50W
FSCM0765RI 65W
70W
50W
60W
FSCM0565RG 70W
85W
60W
70W
FSCM0765RG 85W
95W
70W
85W
Table 1. Maximum Output Power
Notes:
1. Typical continuous power in a non-ventilated enclosed
adapter measured at 50°C ambient.
2. Maximum practical continuous power in an open-frame
design at 50°C ambient.
3. 230 VAC or 100/115 VAC with doubler.
Related Application Notes
• AN-4137: Design Guidelines for Off-line Flyback
Converters Using Fairchild Power Switch (FPS)
• AN-4140: Transformer Design Consideration for off-line
Flyback Converters using Fairchild Power Switch
• AN-4141: Troubleshooting and Design Tips for Fairchild
Power Switch Flyback Applications
• AN-4148: Audible Noise Reduction Techniques for FPS
Applications
Description
The FSCM0765R is an integrated Pulse Width Modulator
(PWM) and SenseFET specifically designed for high
performance offline Switch Mode Power Supplies (SMPS)
with minimal external components. This device is an
integrated high voltage power switching regulator which
combines an avalanche rugged SenseFET with a current
mode PWM control block. The PWM controller includes
integrated fixed frequency oscillator, under voltage lockout,
leading edge blanking (LEB), optimized gate driver, internal
soft start, temperature compensated precise current sources
for a loop compensation, and self protection circuitry.
Compared with a discrete MOSFET and PWM controller
solution, it can reduce total cost, component count, size, and
weight while simultaneously increasing efficiency, productivity,
and system reliability. This device is a basic platform well
suited for cost effective designs of flyback converters.
Typical Circuit
AC
IN Drain
PWM
Ilimit
Vfb Vcc GND
DC
OUT
Figure 1. Typical Flyback Application
©2005 Fairchild Semiconductor Corporation
Rev.1.1.0
1 page  
www.DataSheet4U.com
FSCM0765R
Electrical Characteristics
(Ta = 25°C unless otherwise specified.)
Parameter
SenseFET SECTION
Drain Source Breakdown Voltage
Zero-Gate-Voltage Current
Static Drain Source on Resistance (1)
Output Capacitance
Turn on Delay Time
Rise Time
Turn off Delay Time
Fall Time
CONTROL SECTION
Initial Frequency
Modulated Frequency Range
Frequency Modulation Cycle
Voltage Stability
Temperature Stability (2)
Maximum Duty Cycle
Minimum Duty Cycle
Start Threshold Voltage
Stop Threshold Voltage
Feedback Source Current
Soft-start Time
Initial Frequency
BURST MODE SECTION
Burst Mode Voltages (2)
Symbol
Condition
Min. Typ. Max. Unit
BVDSS
IDSS
RDS(ON)
VGS = 0V, ID = 250μA
VDS = Max, Rating
VGS = 0V
VGS = 10V, ID = 2.3A
650 -
-V
- - 500 μA
- 1.4 1.6 Ω
COSS
VGS = 0V, VDS = 25V,
f = 1MHz
- 100 -
pF
TD(ON) VDD= 325V, ID= 5A
- 25 -
(MOSFET switching
TR
TD(OFF)
time is essentially
independent of
- 60 -
- 115 -
ns
operating temperature)
TF - 65 -
FOSC
ΔFmod
Tmod
FSTABLE
ΔFOSC
DMAX
DMIN
VSTART
VSTOP
IFB
TSS
TLEB
VCC = 14V, VFB = 5V
-
-
10V ≤ VCC ≤ 17V
−25°C ≤ Ta ≤ +85°C
-
-
VFB = GND
VFB = GND
VFB = GND
-
-
60 66 72 kHz
- ±3 - kHz
- 4 - ms
0 1 3%
- ±5 ±10 %
75 80 85 %
- - 0%
11 12 13 V
78 9V
0.7 0.9 1.1 mA
10 15 20 ms
- 300 -
ns
VBH Vcc = 14V
VBL Vcc = 14V
0.4 0.5
0.24 0.3
0.6
0.36
V
V
Notes:
1. Pulse Test: Pulse width ≤ 300μS, duty ≤ 2%
2. These parameters, although guaranteed at the design, are not tested in mass production.
5
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FSCM0765R
2.2 Leading Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, there usually exists a high
current spike through the SenseFET, caused by primary-side
capacitance and secondary-side rectifier reverse recovery.
Excessive voltage across the Rsense resistor can lead to
incorrect feedback operation in the current mode PWM
control. To counter this effect, the FSCM0765R employs a
leading edge blanking (LEB) circuit. This circuit inhibits the
PWM comparator for a short time (TLEB) after the SenseFET
is turned on.
3. Protection Circuit: The FSCM0765R has several self
protective functions such as over load protection (OLP), over
voltage protection (OVP) and thermal shutdown (TSD).
Because these protection circuits are fully integrated into the
IC without external components, the reliability can be
improved without increasing cost. Once the fault condition
occurs, switching is terminated and the SenseFET remains
off. This causes Vcc to fall. When Vcc reaches the UVLO
stop voltage of 8V, the current consumed by the
FSCM0765R decreases to the startup current (typically
25uA) and the current supplied from the DC link charges the
external capacitor (Ca) that is connected to the Vcc pin.
When Vcc reaches the start voltage of 12V, the FSCM0765R
resumes its normal operation. In this manner, the auto-restart
can alternately enable and disable the switching of the power
SenseFET until the fault condition is eliminated (see Figure
19).
Vds Power
on
Fault
occurs
Fault
removed
Vcc
12V
8V
t
Normal
Fault
Operation Situation
Normal
Operation
Figure 19. Auto Restart Operation
3.1 Over Load Protection (OLP): Overload is defined as
the load current exceeding a pre-set level due to an
unexpected event. In this situation, the protection circuit
should be activated to protect the SMPS. However, even
when the SMPS is in the normal operation, the over load
protection circuit can be activated during the load transition.
To avoid this undesired operation, the over load protection
circuit is designed to be activated after a specified time to
determine whether it is a transient situation or an overload
situation. Because of the pulse-by-pulse current limit
capability, the maximum peak current through the SenseFET
is limited, and therefore the maximum input power is
restricted with a given input voltage. If the output consumes
beyond this maximum power, the output voltage (Vo)
decreases below the set voltage. This reduces the current
through the opto-coupler LED, which also reduces the opto-
coupler transistor current, thus increasing the feedback
voltage (Vfb). If Vfb exceeds 2.5V, D1 is blocked and the
5.3uA current source (Idelay) starts to charge CB slowly up to
Vcc. In this condition, Vfb continues increasing until it
reaches 6V, when the switching operation is terminated as
shown in Figure 20. The delay time for shutdown is the time
required to charge CB from 2.5V to 6.0V with 5.3uA (Idelay).
In general, a 10 ~ 50 ms delay time is typical for most
applications.
VFB
6.0V
Over Load Protection
2.5V
T12= Cfb*(6.0-2.5)/Idelay
T1
Figure 20. Over Load Protection
T2 t
3.2 Over Voltage Protection (OVP): If the secondary side
feedback circuit were to malfunction or a solder defect
caused an open in the feedback path, the current through the
opto-coupler transistor becomes almost zero. Then, Vfb
climbs up in a similar manner to the over load situation,
forcing the preset maximum current to be supplied to the
SMPS until the over load protection is activated. Because
more energy than required is provided to the output, the
output voltage may exceed the rated voltage before the over
load protection is activated, resulting in the breakdown of the
devices in the secondary side. To prevent this situation, an
over voltage protection (OVP) circuit is employed. In
general, Vcc is proportional to the output voltage and the
FSCM0765R uses Vcc instead of directly monitoring the
output voltage. If VCC exceeds 19V, an OVP circuit is
activated resulting in the termination of the switching
operation. To avoid undesired activation of OVP during
normal operation, Vcc should be designed to be below 19V.
11
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| PDF Descargar | [ Datasheet FSCM0565RG.PDF ] | |
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