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PDF DS25CP104 Data sheet ( Hoja de datos )
| Número de pieza | DS25CP104 | |
| Descripción | 3.125 Gbps 4x4 LVDS Crosspoint Switch | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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www.DataSheet4U.com
August 2007
DS25CP104
3.125 Gbps 4x4 LVDS Crosspoint Switch with Transmit
Pre-Emphasis and Receive Equalization
General Description
The DS25CP104 is a 3.125 Gbps 4x4 LVDS crosspoint switch
optimized for high-speed signal routing and switching over
lossy FR-4 printed circuit board backplanes and balanced ca-
bles. Fully differential signal paths ensure exceptional signal
integrity and noise immunity. The non-blocking architecture
allows connections of any input to any output or outputs. The
switch configuration can be accomplished via external pins or
the System Management Bus (SMBus) interface.
The DS25CP104 features four levels (Off, Low, Medium,
High) of transmit pre-emphasis (PE) and four levels (Off, Low,
Medium, High) of receive equalization (EQ) settable via the
SMBus interface. Off and Medium PE levels and Off and Low
EQ levels are settable with the external pins. In addition, the
SMBus circuitry enables the loss of signal (LOS) monitors that
can inform a system of the presence of an open inputs con-
dition (e.g. disconnected cable).
Wide input common mode range allows the switch to accept
signals with LVDS, CML and LVPECL levels; the output levels
are LVDS. A very small package footprint requires a minimal
space on the board while the flow-through pinout allows easy
board layout. Each differential input and output is internally
terminated with a 100Ω resistor to lower device insertion and
return losses, reduce component count and further minimize
board space.
Features
■ DC - 3.125 Gbps low jitter, low skew, low power operation
■ Pin and SMBus configurable, fully differential, non-
blocking architecture
■ Pin (two levels) and SMBus (four levels) selectable pre-
emphasis and equalization eliminate ISI jitter
■ Wide Input Common Mode Range enables easy interface
to CML and LVPECL drivers
■ LOS circuitry detects open inputs fault condition
■ On-chip 100Ω input and output termination minimizes
insertion and return losses, reduces component count and
minimizes board space
■ 8 kV ESD on LVDS I/O pins protects adjoining
components
■ Small 6 mm x 6 mm LLP-40 space saving package
Applications
■ SD/HD/3GHD SDI Routers
■ OC-48 / STM-16
■ Fibre Channel (2GFC)
■ InfiniBand and FireWire
Typical Application
© 2007 National Semiconductor Corporation 300037
30003703
www.national.com
1 page  
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Symbol
Parameter
LVDS OUTPUT DC SPECIFICATIONS
VOD
ΔVOD
Differential Output Voltage
Change in Magnitude of VOD for Complimentary
Output States
VOS
ΔVOS
Offset Voltage
Change in Magnitude of VOS for Complimentary
Output States
IOS Output Short Circuit Current (Note 8)
COUT Output Capacitance
ROUT Output Termination Resistor
SUPPLY CURRENT
ICC1 Supply Current
ICC2 Supply Current
ICC3 Supply Current
Conditions
RL = 100Ω
RL = 100Ω
OUT to GND
OUT to VCC
Any LVDS Output Pin to GND
Between OUT+ and OUT-
PWDN = 0
PWDN = 1
PE = Off, EQ = Off
Broadcast (1:4) Mode
PWDN = 1
PE = Off, EQ = Off
Quad Buffer (4:4) Mode
Min Typ Max Units
250
-35
1.05
-35
350 450
35
1.2 1.375
35
-35 -55
7 55
1.2
100
mV
mV
V
mV
mA
mA
pF
Ω
40 50
145 175
mA
mA
157 190 mA
Note 4: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions.
Note 5: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 6: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD and
ΔVOD.
Note 7: Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of
product characterization and are not guaranteed.
Note 8: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
5 www.national.com
5 Page 
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Pre-Emphasis and Equalization Test Circuits
FIGURE 5. Jitter Performance Test Circuit
30003729
FIGURE 6. Pre-Emphasis Performance Test Circuit
30003727
FIGURE 7. Equalization Performance Test Circuit
30003726
11 www.national.com
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet DS25CP104.PDF ] | |
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