MAX1322 Datasheet PDF - Maxim Integrated Products
| Part Number | MAX1322 | |
| Description | (MAX13xx) Simultaneous-Sampling ADCs | |
| Manufacturers | Maxim Integrated Products | |
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19-3157; Rev 2; 8/04
8-/4-/2-Channel, 14-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
General Description
The MAX1316–MAX1318/MAX1320–MAX1322/MAX1324–
MAX1326 14-bit, analog-to-digital converters (ADCs) offer
two, four, or eight independent input channels.
Independent track/hold (T/H) circuitry provides simultane-
ous sampling for each channel. The MAX1316/
MAX1317/MAX1318 have a 0 to +5V input range with
±6.0V fault-tolerant inputs. The MAX1320/MAX1321/
MAX1322 have a ±5V input range with ±16.5V fault-toler-
ant inputs. The MAX1324/MAX1325/MAX1326 have a
±10V input range with ±16.5V fault-tolerant inputs. These
ADCs convert two channels in 2µs, and up to eight chan-
nels in 3.8µs, and have an 8-channel throughput of
250ksps per channel. Other features include a 10MHz
T/H input bandwidth, internal clock, internal (+2.5V) or
external (+2.0V to +3.0V) reference, and power-
saving modes.
A 16.6MHz, 14-bit, bidirectional, parallel interface pro-
vides the conversion results and accepts digital config-
uration inputs.
These devices operate from a +4.75V to +5.25V analog
supply and a separate +2.7V to +5.25V digital supply,
and consume less than 50mA total supply current.
These devices come in a 48-pin TQFP package and oper-
ate over the extended -40°C to +85°C temperature range.
Applications
Multiphase Motor Control
Power-Grid Synchronization
Power-Factor Monitoring and Correction
Vibration and Waveform Analysis
Selector Guide
PART
MAX1316ECM
MAX1317ECM
MAX1318ECM
MAX1320ECM
MAX1321ECM
MAX1322ECM
MAX1324ECM
MAX1325ECM
MAX1326ECM
INPUT RANGE (V)
0 to +5
0 to +5
0 to +5
±5
±5
±5
±10
±10
±10
CHANNEL COUNT
8
4
2
8
4
2
8
4
2
Pin Configurations and Typical Operating Circuits appear at
end of data sheet.
Features
♦ 8-/4-/2-Channel, 14-Bit ADCs
±1.5 LSB INL, ±1 LSB DNL, No Missing Codes
90dBc SFDR, -86dBc THD, 76.5dB SINAD, 77dB
SNR at 100kHz Input
♦ On-Chip T/H Circuit for Each Channel
10ns Aperture Delay
50ps Channel-to-Channel T/H Matching
♦ Fast Conversion Time
One Channel in 1.6µs
Two Channels in 1.9µs
Four Channels in 2.5µs
Eight Channels in 3.7µs
♦ High Throughput
526ksps/ch for One Channel
455ksps/ch for Two Channels
357ksps/ch for Four Channels
250ksps/ch for Eight Channels
♦ Flexible Input Ranges
0 to +5V (MAX1316/MAX1317/MAX1318)
±5V (MAX1320/MAX1321/MAX1322)
±10V (MAX1324/MAX1325/MAX1326)
♦ No Calibration Needed
♦ 14-Bit, High-Speed, Parallel Interface
♦ Internal or External Clock
♦ +2.5V Internal Reference or +2.0V to +3.0V
External Reference
♦ +5V Analog Supply, +3V to +5V Digital Supply
46mA Analog Supply Current (typ)
1.6mA Digital Supply Current (max)
Shutdown and Power-Saving Modes
♦ 48-Pin TQFP Package (7mm ✕ 7mm Footprint)
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
MAX1316ECM
-40°C to +85°C 48 TQFP
MAX1317ECM
-40°C to +85°C 48 TQFP
MAX1318ECM
-40°C to +85°C 48 TQFP
MAX1320ECM
-40°C to +85°C 48 TQFP
MAX1321ECM
-40°C to +85°C 48 TQFP
MAX1322ECM
-40°C to +85°C 48 TQFP
MAX1324ECM
-40°C to +85°C 48 TQFP
MAX1325ECM
-40°C to +85°C 48 TQFP
MAX1326ECM
-40°C to +85°C 48 TQFP
*Future product—contact factory for availability.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
|
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8-/4-/2-Channel, 14-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
TIMING CHARACTERISTICS (Figures 3, 4, 5, 6 and 7) (Tables 1, 3)
PARAMETER
Time-to-First-Conversion Result
Time-to-Next-Conversion Result
CONVST Pulse-Width Low
(Acquisition Time)
CS Pulse Width
RD Pulse-Width Low
RD Pulse-Width High
WR Pulse-Width Low
CS to WR
WR to CS
CS to RD
RD to CS
Data-Access Time
(RD Low to Valid Data)
Bus-Relinquish Time (RD High)
EOC Pulse Width
Input-Data Setup Time
Input-Data Hold Time
External-Clock Period
External-Clock High Period
External-Clock Low Period
External-Clock Frequency
Internal-Clock Frequency
CONVST High to CLK Edge
EOC Low to RD
SYMBOL
tCONV
CONDITIONS
Internal clock
External clock, Figure 6
tNEXT
Internal clock
External clock, Figure 6
tACQ
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t14
t15
t16
t17
t18
(Note 9)
Internal clock
External clock, Figure 6
Logic sensitive to rising edges
Logic sensitive to rising edges
(Note 11)
t19
t20
MIN TYP MAX
1.6 1.8
16
0.3 0.36
3
0.16 100
30
30
30
30
(Note 10)
(Note 10)
(Note 10)
(Note 10)
30
80
10
10
0.08
20
20
0.1
20
30
1
10.00
10
(Note 12)
0
12.5
UNITS
µs
Clock
cycles
µs
Clock
cycles
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Clock
cycles
ns
ns
µs
ns
ns
MHz
MHz
ns
ns
Note 1:
Note 2:
Note 3:
Note 4:
For the MAX1316/MAX1317/MAX1318, VIN = 0 to +5V. For the MAX1320/MAX1321/MAX1322, VIN = -5V to +5V. For the
MAX1324/MAX1325/MAX1326, VIN = -10V to +10V.
All channel performance is guaranteed by correlation to a single channel test.
Offset nulled.
The analog input resistance is terminated to an internal bias point. Calculate the analog input current using:
ICH_
=
VCH_ − VBIAS
RCH_
for VCH within the input voltage range.
Note 5: Throughput rate is given per channel. Throughput rate is a function of clock frequency (fCLK = 10MHz). See the Data
Throughput section for more information.
Note 6: All analog inputs are driven with an FS 100kHz sine wave.
_______________________________________________________________________________________ 5
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