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PDF AD9781 Data sheet ( Hoja de datos )

Número de pieza AD9781
Descripción 500 MSPS DACs
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Data Sheet
FEATURES
High dynamic range, dual DAC parts
Low noise and intermodulation distortion
Single carrier W-CDMA ACLR = 80 dBc @ 61.44 MHz IF
Innovative switching output stage permits usable outputs
beyond Nyquist frequency
LVDS inputs with dual-port or optional interleaved single-
port operation
Differential analog current outputs are programmable from
8.6 mA to 31.7 mA full scale
Auxiliary 10-bit current DACs with source/sink capability for
external offset nulling
Internal 1.2 V precision reference voltage source
Operates from 1.8 V and 3.3 V supplies
315 mW power dissipation
Small footprint, RoHS compliant, 72-lead LFCSP
APPLICATIONS
Wireless infrastructure
W-CDMA, CDMA2000, TD-SCDMA, WiMAX
Wideband communications
LMDS/MMDS, point-to-point
RF signal generators, arbitrary waveform generators
Dual 12-/14-/16-Bit,
LVDS Interface, 500 MSPS DACs
AD9780/AD9781/AD9783
GENERAL DESCRIPTION
The AD9780/AD9781/AD9783 include pin-compatible, high
dynamic range, dual digital-to-analog converters (DACs) with
12-/14-/16-bit resolutions, and sample rates of up to 500 MSPS.
The devices include specific features for direct conversion transmit
applications, including gain and offset compensation, and they
interface seamlessly with analog quadrature modulators such as
the ADL5370.
A proprietary, dynamic output architecture permits synthesis
of analog outputs even above Nyquist by shifting energy away
from the fundamental and into the image frequency.
Full programmability is provided through a serial peripheral
interface (SPI) port. Some pin-programmable features are also
offered for those applications without a controller.
PRODUCT HIGHLIGHTS
1. Low noise and intermodulation distortion (IMD) enable
high quality synthesis of wideband signals.
2. Proprietary switching output for enhanced dynamic
performance.
3. Programmable current outputs and dual auxiliary DACs
provide flexibility and system enhancements.
CLKP
CLKN
LVDS
INTERFACE
D[15:0]
VIA, VIB
FUNCTIONAL BLOCK DIAGRAM
AD9783 DUAL LVDS DAC
INTERFACE LOGIC
SERIAL
PERIPHERAL
INTERFACE
INTERNAL
REFERENCE
AND
BIAS
GAIN
DAC
GAIN
DAC
OFFSET
DAC
OFFSET
DAC
16-BIT
I DAC
16-BIT
Q DAC
IOUT1P
IOUT1N
IOUT2P
IOUT2N
AUX1P
AUX1N
AUX2P
AUX2N
Figure 1.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2007–2012 Analog Devices, Inc. All rights reserved.

1 page




AD9781 pdf
Data Sheet
AD9780/AD9781/AD9783
AC SPECIFICATIONS
TMIN to TMAX, AVDD33 = 3.3 V, DVDD33 = 3.3 V, DVDD18 = 1.8 V, CVDD18 = 1.8 V, IOUTFS = 20 mA, maximum sample rate, unless
otherwise noted.
Table 3.
Parameter
SPURIOUS FREE DYNAMIC RANGE (SFDR)
fDAC = 500 MSPS, fOUT = 20 MHz
fDAC = 500 MSPS, fOUT = 120 MHz
fDAC = 500 MSPS, fOUT = 380 MHz (Mix Mode)
fDAC = 500 MSPS, fOUT = 480 MHz (Mix Mode)
TWO-TONE INTERMODULATION DISTORTION (IMD)
fDAC = 500 MSPS, fOUT = 20 MHz
fDAC = 500 MSPS, fOUT = 120 MHz
fDAC = 500 MSPS, fOUT = 380 MHz (Mix Mode)
fDAC = 500 MSPS, fOUT = 480 MHz (Mix Mode)
ONE-TONE NOISE SPECTRAL DENSITY (NSD)
fDAC = 500 MSPS, fOUT = 40 MHz
fDAC = 500 MSPS, fOUT = 120 MHz
fDAC = 500 MSPS, fOUT = 380 MHz (Mix Mode)
fDAC = 500 MSPS, fOUT = 480 MHz (Mix Mode)
W-CDMA ADJACENT CHANNEL LEAKAGE RATIO (ACLR),
SINGLE CARRIER
fDAC = 491.52 MSPS, fOUT = 20 MHz
fDAC = 491.52 MSPS, fOUT = 80 MHz
fDAC = 491.52 MSPS, fOUT = 411.52 MHz
fDAC = 491.52 MSPS, fOUT = 471.52 MHz
AD9780
AD9781
AD9783
Min Typ
Max Min Typ
Max Min Typ Max Unit
79 78 80 dBc
67 66 68 dBc
55 58 62 dBc
58 62 59 dBc
91 93 86 dBc
80 75 79 dBc
69 70 64 dBc
60.5 61.5 66 dBc
−157
−154.5
−153
−152
−162
−156.5
−153
−152
−165
−157
−154
−153
dBc
dBc
dBc
dBc
−81
−82.5
−82 dBc
−80
−82.5
−81 dBc
−71 −68 −69 dBc
−69 −69 −70 dBc
Rev. B | Page 5 of 32

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AD9781 arduino
Data Sheet
0.4
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CODE
Figure 11. AD9781 INL, TA = 85°C, FS = 20 mA
16,383
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Figure 12. AD9781 INL, TA = −40°C, FS = 20 mA
16,383
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1024
2048
3072
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Figure 13. AD9780 INL, TA = −40°C, FS = 20 mA
4096
AD9780/AD9781/AD9783
0.059
–0.060
–0.179
–0.297
–0.416
0
4096
8192
12,288
CODE
Figure 14. AD9781 DNL, TA = 85°C, FS = 20 mA
16,383
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0
4096
8192
12,288
CODE
Figure 15. AD9781 DNL, TA = −40°C, FS = 20 mA
16,383
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
0
1024
2048
3072
CODE
Figure 16. AD9780 INL, TA = 85°C, FS = 20 mA
4096
Rev. B | Page 11 of 32

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