89C450 Datasheet PDF - Dallas Semiconducotr
| Part Number | 89C450 | |
| Description | DS89C450 | |
| Manufacturers | Dallas Semiconducotr | |
| Logo |  |
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DS89C430/DS89C440/DS89C450
Ultra-High-Speed Flash Microcontrollers
www.maxim-ic.com
GENERAL DESCRIPTION
The DS89C430, DS89C440, and DS89C450 offer the
highest performance available in 8051-compatible
microcontrollers. They feature newly designed
processor cores that execute instructions up to 12
times faster than the original 8051 at the same
crystal speed. Typical applications will experience a
speed improvement up to 10x. At 1 million
instructions per second (MIPS) per megahertz, the
microcontrollers achieve 33 MIPS performance from
a maximum 33MHz clock rate.
The Ultra-High-Speed Flash Microcontroller User’s Guide should
be used in conjunction with this data sheet. Download it at
www.maxim-ic.com/microcontrollers.
APPLICATIONS
Data Logging
Automotive Test Equipment
Magstripe Reader/Scanner
Gaming Equipment
HVAC
Uninterruptible Power
Supplies
Building Energy Control and
Management
White Goods (Washers,
Microwaves, etc.)
Vending
Motor Control
Consumer Electronics
Telephones
Programmable Logic
Controllers
Building Security and
Door Access Control
Industrial Control and
Automation
ORDERING INFORMATION
PART
DS89C430-MNL
DS89C430-QNL
DS89C430-ENL
DS89C440-MNL
DS89C440-QNL
DS89C440-ENL
DS89C450-MNL
DS89C450-QNL
DS89C450-ENL
FLASH
MEMORY SIZE
16kB x 8
16kB x 8
16kB x 8
32kB x 8
32kB x 8
32kB x 8
64kB x 8
64kB x 8
64kB x 8
PIN-PACKAGE
40 PDIP
44 PLCC
44 TQFP
40 PDIP
44 PLCC
44 TQFP
40 PDIP
44 PLCC
44 TQFP
Complete Selector Guide appears at end of data sheet.
Pin Configurations appear at end of data sheet.
FEATURES
§ High-Speed 8051 Architecture
One Clock-Per-Machine Cycle
DC to 33MHz Operation
Single Cycle Instruction in 30ns
Optional Variable Length MOVX to Access
Fast/Slow Peripherals
Dual Data Pointers with Automatic
Increment/Decrement and Toggle Select
Supports Four Paged Memory-Access Modes
§ On-Chip Memory
16kB/32kB/64kB Flash Memory
In-Application Programmable
In-System Programmable Through Serial Port
1kB SRAM for MOVX
§ 80C52 Compatible
8051 Pin and Instruction Set Compatible
Four Bidirectional, 8-Bit I/O Ports
Three 16-Bit Timer Counters
256 Bytes Scratchpad RAM
§ Power-Management Mode
Programmable Clock Divider
Automatic Hardware and Software Exit
§ ROMSIZE Feature
Selects Internal Program Memory Size from
0 to 64kB
Allows Access to Entire External Memory Map
Dynamically Adjustable by Software
§ Peripheral Features
Two Full-Duplex Serial Ports
Programmable Watchdog Timer
13 Interrupt Sources (Six External)
Five Levels of Interrupt Priority
Power-Fail Reset
Early Warning Power-Fail Interrupt
Electromagnetic Interference (EMI) Reduction
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
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REV: 060204
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DS89C430/DS89C440/DS89C450 Ultra-High-Speed Flash Microcontrollers
AC CHARACTERISTICS (continued)
(VCC = 4.5V to 5.5V, TO = -40°C to +85°C.) (See Figure 1, Figure 2, and Figure 3.)
PARAMETER
SYMBOL
1-CYCLE
PAGE MODE 1
MIN MAX
2-CYCLE
PAGE MODE 1
MIN MAX
PSEN Low to Valid Instruction
In
tPLIV
tCLCL - 20
tCLCL - 20
4-CYCLE
PAGE MODE 1
MIN MAX
2tCLCL - 20
PAGE MODE 2
MIN MAX
tCLCL - 20
NONPAGE MODE
MIN MAX
UNITS
2tCLCL - 20
ns
Input Instruction Hold After
PSEN
tPXIX
0
0
0
0
0 ns
Input Instruction Float After
PSEN
tPXIZ
tCLCL - 5
tCLCL - 5
ns
Port 0 Address to Valid
Instruction In
tAVIV0
1.5tCLCL - 22
3tCLCL - 22
ns
Port 2 Address to Valid
Instruction In
tAVIV2
tCLCL - 20
1.5tCLCL - 20
2.5tCLCL - 20
3tCLCL - 20
3.5tCLCL - 20
ns
PSEN Low to Port 0 Address
Float
tPLAZ
0 0 ns
RD Pulse Width (P3.7)
(Note 16)
WR Pulse Width (P3.6)
(Note 16)
RD (P3.7) Low to Valid Data In
(Note 16)
tRLRH
tWLWH
tRLDV
tCLCL - 5
+ tSTC1
tCLCL - 5
+ tSTC1
tCLCL - 18
+ tSTC1
tCLCL - 5
+ tSTC1
tCLCL - 5
+ tSTC1
tCLCL - 18
+ tSTC1
2tCLCL - 5
+ tSTC1
2tCLCL - 5
+ tSTC1
2tCLCL - 18
+ tSTC1
2tCLCL - 5
+ tSTC1
2tCLCL - 5
+ tSTC1
2tCLCL - 18
+ tSTC1
2tCLCL - 5
+ tSTC1
2tCLCL - 5
+ tSTC1
2tCLCL - 18
+ tSTC1
ns
ns
ns
Data Hold After RD (P3.7)
tRHDX
0
0
0
0
0 ns
Data Float After RD (P3.7)
MOVX ALE Low to Input Data
Valid (Note 16)
tRHDZ
tLLDV
tCLCL - 5
2tCLCL - 8
+ tSTC1
tCLCL - 5
2tCLCL - 5
+ tSTC1
ns
ns
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| Download | [ 89C450.PDF Datasheet ] | |
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