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PDF HD66702 Data sheet ( Hoja de datos )
| Número de pieza | HD66702 | |
| Descripción | Dot-Matrix Liquid Crystal Display Controller/Driver | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HD66702
(Dot Matrix Liquid Crystal Display Controller/Driver)
Description
The HD66702 dot-matrix liquid crystal display controller and driver LSI displays alphanumerics,
Japanese kana characters, and symbols. It can be configured to drive a dot-matrix liquid crystal display
under the control of a 4- or 8-bit microprocessor. Since all the functions required for driving a dot-matrix
liquid crystal display are internally provided on one chip, a minimal system can be interfaced with this
controller/driver.
A single HD66702 can display up to two 20-character lines.
The low 3-V power supply of the HD66702 under development is suitable for any portable battery-driven
product requiring low power dissipation.
Features
• 5 × 7 and 5 × 10 dot matrix possible
• 80 × 8-bit display RAM (80 characters max.)
• 7,200-bit character generator ROM
160 character fonts (5 × 7 dot)
32 character fonts (5 × 10 dot)
• 64 × 8-bit character generator RAM
8 character fonts (5 × 7 dot)
4 character fonts (5 × 10 dot)
• 16-common × 100-segment liquid crystal display driver
• Programmable duty cycles
1/8 for one line of 5 × 7 dots with cursor
1/11 for one line of 5 × 10 dots with cursor
1/16 for two lines of 5 × 7 dots with cursor
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HD66702
HD66702 Block Diagram
Reset
circuit
ACL
OSC1 OSC2 EXT
CPG
Timing
generator
CL1
CL2
M
Instruction
register (IR)
8
7
MPU
RS inter-
R/W face
E
Instruction
decoder
Display
data RAM
(DDRAM)
80 × 8 bits
D
16-bit
shift
register
Common
signal
driver
COM1 to
COM16
16
DB4 to
DB7
DB0 to
DB3
Input/
output
buffer
Address
counter
7
7
8
8 Data
register
(DR)
Busy
flag
7
8
88
100-bit
shift
register
100-bit
latch
circuit
Segment
signal
driver
SEG1 to
SEG100
100
LCD drive
voltage
selector
TEST
GND
VCC
Character
generator
RAM
(CGRAM)
64 bytes
Character
generator
ROM
(CGROM)
7,200 bits
Cursor
and
blink
controller
55
Parallel/serial converter
and
attribute circuit
V1 V2 V3 V4 V5
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HD66702
Pin Functions
Table 1 Pin Functional Description
Signal
RS
I/O
I
R/:
I
E
DB4 to DB7
I
I/O
DB0 to DB3
I/O
CL1 O
CL2 O
MO
DO
COM1 to COM16 O
SEG1 to SEG100
V1 to V5
VCC, GND
TEST
EXT
O
—
—
I
I
OSC1, OSC2
—
Device
Interfaced with
MPU
MPU
MPU
MPU
MPU
Extension driver
Extension driver
Extension driver
Extension driver
LCD
LCD
Power supply
Power supply
—
—
—
Function
Selects registers
0: Instruction register (for write)
Busy flag: address counter (for read)
1: Data register (for write and read)
Selects read or write
0: Write
1: Read
Starts data read/write
Four high order bidirectional tristate data bus pins.
Used for data transfer between the MPU and the
HD66702. DB7 can be used as a busy flag.
Four low order bidirectional tristate data bus pins. Used
for data transfer between the MPU and the HD66702.
These pins are not used during 4-bit operation.
Clock to latch serial data D sent to the extension driver
Clock to shift serial data D
Switch signal for converting the liquid crystal drive
waveform to AC
Character pattern data corresponding to each segment
signal
Common signals that are not used are changed to non-
selection waveforms. COM9 to COM16 are non-
selection waveforms at 1/8 duty factor and COM12 to
COM16 are non-selection waveforms at 1/11 duty
factor.
Segment signals
Power supply for LCD drive
VCC: +5V or +3V, GND: 0V
Test pin, which must be grounded
0: Enables extension driver control signals CL1, CL2,
M, and D to be output from its corresponding pins.
1: Drives CL1, CL2, M, and D as tristate, lowering
power dissipation.
Pins for connecting the registers of the internal clock
oscillation. When the pin input is an external clock, it
must be input to OSC1.
237
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HD66702.PDF ] | |
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